ATmega48P Atmel Corporation, ATmega48P Datasheet - Page 270
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ATmega48P
Manufacturer Part Number
ATmega48P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega48P
Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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26.2.3
26.2.4
270
ATmega48P/88P/168P
Preventing Flash Corruption
Programming Time for Flash when Using SPM
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
2. Keep the AVR core in Power-down sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 26-1.
Note:
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
1. Minimum and maximum programming time is per individual operation.
SPM Programming Time
Symbol
CC
, the Flash program can be corrupted because the supply voltage is
(1)
Min Programming Time
3.7 ms
CC
Table 27-6
reset protection circuit can be
Max Programming Time
shows the typical pro-
CC
. This will pre-
4.5 ms
8025M–AVR–6/11