ATmega48P Atmel Corporation, ATmega48P Datasheet - Page 12
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ATmega48P
Manufacturer Part Number
ATmega48P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega48P
Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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20 000
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Part Number:
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101
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Part Number:
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ATMEL
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Company:
Part Number:
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Part Number:
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Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega48PA-15MT
Manufacturer:
ATMEL
Quantity:
110
Company:
Part Number:
ATmega48PA-15MZ
Manufacturer:
ATMEL
Quantity:
3 500
Part Number:
ATmega48PA-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.4
12
General Purpose Register File
ATmega48P/88P/168P
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve
the required performance and flexibility, the following input/output schemes are supported by the
Register File:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
Figure 7-2
Figure 7-2.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
As shown in
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y- and Z-pointer registers can be set to index any register in the file.
Registers
Purpose
shows the structure of the 32 general purpose working registers in the CPU.
General
Working
Figure
AVR CPU General Purpose Working Registers
7-2, each register is also assigned a data memory address, mapping them
7
R14
R16
R13
R15
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
…
…
0
Addr.
0x0D
0x0E
0x1A
0x1B
0x1C
0x1D
0x1E
0x00
0x01
0x02
0x0F
0x10
0x11
0x1F
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
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