ATmega329P Atmel Corporation, ATmega329P Datasheet - Page 37
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ATmega329P
Manufacturer Part Number
ATmega329P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega329P
Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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9. Power Management and Sleep Modes
9.1
9.2
8021G–AVR–03/11
Overview
Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
Figure 8-1 on page 27
their distribution. The figure is helpful in selecting an appropriate sleep mode.
the different sleep modes, their wake up sources and BOD disable ability.
Table 9-1.
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Sleep Mode
Idle
ADCNRM
Power-down
Power-save
Standby
”BOD Disable” on page 38
1. Only recommended with external crystal or resonator selected as clock source.
2. If either LCD controller or Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
presents the different clock systems in the ATmega329P/3290P, and
X
for more details.
X
X
X
X
X
Oscillators
X
X
X
X
X
X
(2)
(2)
(2)
X
X
X
X
X
(3)
(3)
(3)
(3)
ATmega329P/3290P
X
X
X
X
X
Wake-up Sources
X
Table 9-2 on page 42
X
X
(2)
X
X
X
X
Table 9-1
X
X
X
X
X
X
shows
for a
X
X
X
37
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