ATmega3290 Atmel Corporation, ATmega3290 Datasheet - Page 227

• Manufacturer Part Number: ATmega3290
• Manufacturer: Atmel Corporation

Specifications of ATmega3290

• Flash (kbytes): 32 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22.7.4
22.7.5
2552K–AVR–04/11
ADCSRB – ADC Control and Status Register B
DIDR0 – Digital Input Disable Register 0
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in
page
• Bit 7 – Reserved Bit
This bit is reserved for future use. To ensure compatibility with future devices, this bit must be
written to zero when ADCSRB is written.
• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger
an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion
will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-
ger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
Table 22-5.
• Bit 7:0 – ADC7D:ADC0D: ADC7:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC7:0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
(0x7B)
Read/Write
Initial Value
Bit
(0x7E)
Read/Write
Initial Value
ADTS2
221.
0
0
0
0
1
1
1
1
ADC7D
ADC Auto Trigger Source Selections
R/W
R
7
0
7
–
0
ADC6D
ADTS1
ACME
R/W
R/W
6
0
6
0
0
0
1
1
0
0
1
1
ADC5D
R/W
5
0
R
5
–
0
ADC4D
R/W
ADTS0
4
0
R
4
–
0
0
1
0
1
0
1
0
1
ATmega329/3290/649/6490
ADC3D
R/W
3
0
R
3
–
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare MatchA
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
ADC2D
ADTS2
R/W
R/W
2
0
2
0
ADC1D
ADTS1
R/W
R/W
1
0
1
0
“ADC Conversion Result” on
ADC0D
ADTS0
R/W
R/W
0
0
0
0
ADCSRB
DIDR0
.
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