ATmega2561R212 Atmel Corporation, ATmega2561R212 Datasheet - Page 355
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ATmega2561R212
Manufacturer Part Number
ATmega2561R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega2561R212
Flash (kbytes)
256 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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30.9.2
30.9.3
2549N–AVR–05/11
AVR_RESET (0xC)
PROG_ENABLE (0x4)
Figure 30-13. State Machine Sequence for Changing the Instruction Word
The AVR specific public JTAG instruction for setting the AVR device in the Reset mode or taking
the device out from the Reset mode. The TAP controller is not reset by this instruction. The one
bit Reset Register is selected as Data Register. Note that the reset will be active as long as there
is a logic “one” in the Reset Chain. The output from this chain is not latched.
The active states are:
•
The AVR specific public JTAG instruction for enabling programming via the JTAG port. The 16-
bit Programming Enable Register is selected as Data Register. The active states are the
following:
•
•
Shift-DR: The Reset Register is shifted by the TCK input
Shift-DR: The programming enable signature is shifted into the Data Register
Update-DR: The programming enable signature is compared to the correct value, and
Programming mode is entered if the signature is valid
1
0
Test-Logic-Reset
Run-Test/Idle
0
1
ATmega640/1280/1281/2560/2561
1
0
Select-DR Scan
Capture-DR
Update-DR
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
1
0
0
1
0
1
1
0
1
1
0
0
1
0
Select-IR Scan
Capture-IR
Update-IR
Pause-IR
Exit1-IR
Exit2-IR
Shift-IR
1
0
0
1
0
1
1
0
1
1
0
0
355
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