ATmega16HVA Atmel Corporation, ATmega16HVA Datasheet - Page 136

• Manufacturer Part Number: ATmega16HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVA

• Flash (kbytes): 16 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

24.2
24.2.1
24.2.2
136
FET Driver
ATmega8HVA/16HVA
Features
Overview
•
•
The ATmega8HVA/16HVA includes a FET Driver. The FET Driver is designed for driving N-
channel FETs used as high side switch in 1- or 2-Cell Li-Ion battery pack. A block diagram of the
FET driver is shown in
When charging deeply over-discharged cells, the FET Driver will be operated in Deep Under-
Voltage Recovery (DUVR) mode. In DUVR mode the FET Driver regulates the voltage at the
VFET pin to typically 2.0 Volts in 1-Cell applications and typically 4.0 Volts in 2-Cell applications.
This is done by operating the Charge FET at a point where the drain-source voltage is equal to
the voltage difference between the cell voltage and the required VFET operating voltage. As the
cell voltage increases, the drain-source voltage of the Charge FET will decrease until the
Charge FET is completely on. See
In normal operation (DUVRD = 1), the Charge FET/Discharge FET is switched on by pumping
OC/OD sufficiently above the VFET supply voltage. To turn off the Charge FET/Discharge FET,
OC/OD is pulled quickly low. See
details.
Figure 24-2. FET Driver block diagram.
Charge-pump for generating suitable gate drive for N-Channel FET switch on high side
Deep Under-voltage Recovery mode that allows normal operation while charging a Deeply Over-
discharged battery from 0-volt
BANDGAP
CONTROL
_VREG
LDO
REF.
FET
CLK
Figure 24-2 on page
DUVRD
CHARGE_EN
DISCHARGE_EN
CLK_OSC
DVDD
DUALC_MODE
VREF
Table 29-5 on page 170
Figure 24-3 on page 137
Charge
C-FET
Pump
14V clamp
136.
Charge FET
Charge
D-FET
1k
Pump
NFET DRIVER
Discharge FET
1k
for details.
14V clamp
and
Table 29-5 on page 170
BATT+
BATT-
8024A–AVR–04/08
for