ATmega16HVA Atmel Corporation, ATmega16HVA Datasheet - Page 118

• Manufacturer Part Number: ATmega16HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVA

• Flash (kbytes): 16 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

21.3
21.3.1
118
Register Description
ATmega8HVA/16HVA
BGCCR – Bandgap Calibration C Register
Figure 21-1. Reference Circuitry
• Bit 7 - BGD: Bandgap Disable
Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared
(zero) before enabling CC-ADC, V-ADC or Battery Protection, and must remain unset (zero)
while either of these modules are enabled.
• Bit 6 – Res: Reserved Bit
This bit is reserved for future use.
• Bit 5:0 – BGCC5:0: BG Calibration of PTAT Current
These bits are used for trimming of the nominal value of the bandgap reference voltage. These
bits are binary coded. Minimum VREF: 000000, maximum VREF: 111111. Step size approxi-
mately 2 mV.
Updating the BGCC bits will affect both the regulator output voltage and the BOD detection
level. The BOD will react quickly to the new detection level, while the voltage regulator will adjust
the output voltage more slowly due to the external reservoir capacitor. Therefore, if the value is
increased more than a certain step size, the new BOD level may rise above the regulator output
voltage, and a false BOD reset will occur. It is recommended that the BGCC bits are updated
with a step size of 1. To allow the voltage regulator to reach the new level between each step, a
delay of 20 µs should be added between each update of the BGCC values .
Bit
(0xD0)
Read/Write
Initial Value
BG Calibration
BG Reference
BGD
Register
R/W
7
0
R
6
–
0
1.1V
VPTAT
BGCC5
R/W
5
0
BGCC4
R/W
4
0
BGCC3
R/W
VREF_P
VREF_N
0.22V
3
0
VREF_GND
VREF
BGCC2
R/W
2
0
BGCC1
R/W
1
0
BGCC0
CREF
R/W
0
0
8024A–AVR–04/08
BGCCR