AT90USB1287 Atmel Corporation, AT90USB1287 Datasheet - Page 270
AT90USB1287
Manufacturer Part Number
AT90USB1287
Description
Manufacturer
Atmel Corporation
Specifications of AT90USB1287
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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22.8
22.9
270
Suspend, Wake-up and Resume
Detach
AT90USB64/128
ADDEN is cleared by hardware:
When this bit is cleared, the default device address 00h is used.
After a period of 3 ms during which the USB line was inactive, the controller switches to the full-
speed mode and triggers (if enabled) the SUSPI (suspend) interrupt. The firmware may then set
the FRZCLK bit.
The CPU can also, depending on software architecture, enter in the idle mode to lower again the
power consumption.
There are two ways to recover from the “Suspend” mode:
There are no relationship between the SUSPI interrupt and the WAKEUPI interrupt: the WAKE-
UPI interrupt is triggered as soon as there are non-idle patterns on the data lines. Thus, the
WAKEUPI interrupt can occurs even if the controller is not in the “suspend” mode.
When the WAKEUPI interrupt is triggered, if the SUSPI interrupt bit was already set, it is cleared
by hardware.
When the SUSPI interrupt is triggered, if the WAKEUPI interrupt bit was already set, it is cleared
by hardware.
The reset value of the DETACH bit is 1.
It is possible to re-enumerate a device, simply by setting and clearing the DETACH bit.
Figure 22-3. Detach a device in Full-speed:
• after a power-up reset,
• when an USB reset is received,
• or when the macro is disabled (USBE cleared)
• First one is to clear the FRZCLK bit. This is possible if the CPU is not in the Idle mode.
• Second way, if the CPU is “idle”, is to enable the WAKEUPI interrupt (WAKEUPE set). Then,
• Setting DETACH will disconnect the pull-up on the D+ or D- pad (depending on full or low
as soon as an non-idle signal is seen by the controller, the WAKEUPI interrupt is triggered.
The firmware shall then clear the FRZCLK bit to restart the transfer.
speed mode selected). Then, clearing DETACH will connect the pull-up on the D+ or D- pad.
UVREF
EN=1
D +
D -
Detach, then
Attach
UVREF
EN=1
D +
D -
7593K–AVR–11/09
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