AT89S8253 Atmel Corporation, AT89S8253 Datasheet - Page 21
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AT89S8253
Manufacturer Part Number
AT89S8253
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89S8253.pdf
(60 pages)
2.AT89S8253.pdf
(2 pages)
3.AT89S8253.pdf
(2 pages)
4.AT89S8253.pdf
(2 pages)
Specifications of AT89S8253
Flash (kbytes)
12 Kbytes
Max. Operating Frequency
24 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
0.25
Eeprom (bytes)
2048
Operating Voltage (vcc)
2.7 to 5.5
Timers
3
Isp
SPI
Watchdog
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89S8253-24AC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT89S8253-24AI
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Quantity:
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Company:
Part Number:
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Manufacturer:
ATMEL
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6 250
Part Number:
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Manufacturer:
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Quantity:
20 000
Company:
Part Number:
AT89S8253-24JC
Manufacturer:
ATMEL
Quantity:
5 530
Company:
Part Number:
AT89S8253-24JC
Manufacturer:
ATM
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3 290
Company:
Part Number:
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Manufacturer:
ATMEL
Quantity:
6 988
Part Number:
AT89S8253-24JC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3286P–MICRO–3/10
In the previous example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a 0 in bit 0 and it ignores bit 1. Slave 1 requires a 0 in
bit 1 and bit 0 is ignored. A unique address for slave 0 would be 1100 0010 since slave 1
requires a 0 in bit 1. A unique address for slave 1 would be 1100 0001 since a 1 in bit 0 will
exclude slave 0. Both slaves can be selected at the same time by an address which has bit 0 = 0
(for slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed with 1100 0000.
In a more complex system the following could be used to select slaves 1 and 2 while excluding
slave 0:
Slave 0
Slave 1
Slave 2
In the previous example the differentiation among the 3 slaves is in the lower 3 address bits.
Slave 0 requires that bit 0 = 0 and it can be uniquely addressed by 1110 0110. Slave 1 requires
that bit 1 = 0 and it can be uniquely addressed by 1110 and 0101. Slave 2 requires that bit 2 = 0
and its unique address is 1110 0011. To select Slaves 0 and 1 and exclude Slave 2, use
address 1110 0100, since it is necessary to make bit 2 = 1 to exclude slave 2.
The Broadcast Address for each slave is created by taking the logical OR of SADDR and
SADEN. Zeros in this result are trended as don’t-cares. In most cases, interpreting the don’t-
cares as ones, the broadcast address will be FF hexadecimal.
Upon reset SADDR (SFR address 0A9H) and SADEN (SFR address 0B9H) are loaded with 0s.
This produces a given address of all “don’t cares” as well as a Broadcast address of all “don’t
cares”. This effectively disables the Automatic Addressing mode and allows the microcontroller
to use standard 80C51-type UART drivers which do not make use of this feature.
SADDR = 1100 0000
SADEN = 1111 1001
Given
SADDR = 1110 0000
SADEN = 1111 1010
Given
SADDR = 1110 0000
SADEN = 1111 1100
Given
= 1100 0XX0
= 1110 0X0X
= 1110 00XX
AT89S8253
21