AT89S8253 Atmel Corporation, AT89S8253 Datasheet
AT89S8253
Manufacturer Part Number
AT89S8253
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89S8253.pdf
(60 pages)
2.AT89S8253.pdf
(2 pages)
3.AT89S8253.pdf
(2 pages)
4.AT89S8253.pdf
(2 pages)
Specifications of AT89S8253
Flash (kbytes)
12 Kbytes
Max. Operating Frequency
24 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
0.25
Eeprom (bytes)
2048
Operating Voltage (vcc)
2.7 to 5.5
Timers
3
Isp
SPI
Watchdog
Yes
Available stocks
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Price
Part Number:
AT89S8253-24AC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT89S8253-24AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT89S8253-24AU
Manufacturer:
ATMEL
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6 250
Part Number:
AT89S8253-24AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
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Manufacturer:
ATMEL
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5 530
Company:
Part Number:
AT89S8253-24JC
Manufacturer:
ATM
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3 290
Company:
Part Number:
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Manufacturer:
ATMEL
Quantity:
6 988
Part Number:
AT89S8253-24JC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Errata
The following are known problems with Rev. M of the AT89S8253 device:
1. SPI Communications
During SPI communications, when the SPI is disabled by clearing the SPE (SPCR.6)
bit, the interface is only reset for one clock cycle afterwards. This will result in clock
glitches or missing clocks if the user is trying to switch the clock modes (CPOL,
CPHA) even if SPE is 0.
2. Timer 1 as Baud Rate Generator
Timer 1 does not work as a baud rate generator in Modes 0 or 1 for very low baud
rates (< 50 bps).
Workaround:
Make sure that in the software the SPE bit toggles 1 --> 0 after the mode bits have
changed:
Workaround:
For slow baud rates, use Timer 2 for baud rate generation instead. This problem
will be completely fixed in revision N.
Assembly Code:
C Language:
Change CPHA when SPI is still enabled (SPE = 1)
Change CPHA when SPI is not enabled (SPE = 0)
Change CPHA when SPI is still enabled (SPE = 1)
Change CPHA when SPI is not enabled (SPE = 0)
; SPCR was 50h
MOV SPCR, #014h ; clear SPE and set CPHA
ORL SPCR, #040h ; set SPE
; SPCR was 10h
MOV SPCR, #054h ; set SPE and set CPHA
ANL SPCR, #0BFh ; clear SPE
ORL SPCR, #040h ; set SPE
/* SPCR was 0x50 */
SPCR = 0x14; /* clear SPE and set CPHA */
SPCR = SPCR | 0x40; /* set SPE */
/* SPCR was 0x10 */
SPCR = 0x54 /* set SPE and set CPHA */
SPCR = SPCR & 0xBF /* clear SPE */
SPCR = SPCR | 0x40 /* set SPE */
AT89
Microcontrollers
AT89S8253
Rev. M
Errata Sheet
3610B–MICRO–1/06
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AT89S8253 Summary of contents
Page 1
... Errata The following are known problems with Rev the AT89S8253 device: 1. SPI Communications During SPI communications, when the SPI is disabled by clearing the SPE (SPCR.6) bit, the interface is only reset for one clock cycle afterwards. This will result in clock glitches or missing clocks if the user is trying to switch the clock modes (CPOL, CPHA) even if SPE is 0 ...
Page 2
... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2006. All rights reserved. Atmel registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...