AT89LP51RC2 Atmel Corporation, AT89LP51RC2 Datasheet - Page 200

• Manufacturer Part Number: AT89LP51RC2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51RC2

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 1.375
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

Figure 24-7. Bootloader Functional Description
24.5.1
200
AT89LP51RB2/RC2/IC2 Preliminary
Bootloader Process
Specific Protocol
External Host with
Communication
The bootloader can be activated by two means: Hardware conditions or regular boot process.
• ISP Communication Management
• User Call Management
• Flash Memory Management
The purpose of this process is to manage the communication and its protocol between the
on-chip bootloader and a external device. The on-chip ROM implements a serial protocol
(see section
communication frame (UART) into Flash memory access (read, write, erase, etc.).
Several Application Program Interface (API) calls are available for use by an application
program to permit selective erasing and programming of Flash pages. All calls are made
through a common interface (API calls), included in the ROM bootloader. The programming
functions are selected by setting up the microcontroller’s registers before making a call to a
common entry point (0xFFF0). Results are returned in the registers. The purpose on this
process is to translate the registers values into internal Flash Memory Management. See
Application Programming (IAP)” on page 190
This process manages low level access to Flash memory (performs read and write access).
ISP Communication
Management
“Bootloader Protocol Description” on page
Flash Memory
Management
Memory
Flash
Management (API)
User Call
205). This process translate serial
Application
User
3722A–MICRO–10/11
“In-