AT80C51RD2 Atmel Corporation, AT80C51RD2 Datasheet - Page 8
AT80C51RD2
Manufacturer Part Number
AT80C51RD2
Description
Manufacturer
Atmel Corporation
Specifications of AT80C51RD2
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
1.25
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Watchdog
Yes
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5. Oscillators
5.1
5.2
5.2.1
8
Overview
Registers
AT80C51RD2
Prescaler Divider
One oscillator is available for CPU:
In order to optimize the power consumption and the execution time needed for a specific task,
an internal prescaler feature has been implemented between the selected oscillator and the
CPU.
Table 5-1.
Reset Value = 1111 1111b
Not bit addressable
A hardware RESET puts the prescaler divider in the following state:
• OSC used for high frequency (3 MHz to 40 MHz)
• CKRL = FFh: F
• Any value between FFh down to 00h can be written by software into CKRL register in order to
Number
KS signal selects OSC: F
divide frequency of the selected oscillator:
7:0
Bit
7
-
– CKRL = 00h: minimum frequency
– CKRL = FFh: maximum frequency
– F
F
F
F
F
In X2 mode:
In X1 mode:
CLK CPU
CLK CPU
CLK CPU
CLK CPU
CLK CPU
Mnemonic
CKRL
Clock Reload Register
Bit
= F
= F
= F
= F
and F
6
-
CLK CPU
CLK PERIPH
CLK PERIPH
CLK PERIPH
CLK PERIPH
CLK PERIPH
Description
Clock Reload Register: Prescaler value
F
F
= F
CPU
CPU
CLK OUT
CLK PERIPH
5
-
= F
= F
= F
= F
=
=
F
F
OSC
OSC
OSC
OSC
CLKPERIPH
CLKPERIPH
= F
/1020 (Standard Mode)
/510 (X2 Mode)
/2 (Standard Mode)
(X2 Mode)
= F
OSC
4
-
OSC
=
=
/2 (Standard C51 feature)
--------------------------------------------- -
2
--------------------------------------------- -
4
×
×
(
(
255 CKRL
255 CKRL
F
F
OSCA
3
OSC
-
–
–
)
)
2
-
1
-
4113D–8051–01/09
0
-