AT32UC3L016 Atmel Corporation, AT32UC3L016 Datasheet - Page 355

• Manufacturer Part Number: AT32UC3L016
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L016

• Flash (kbytes): 16 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32000D–04/2011
STSWP.{H, W} – Swap and Store
Architecture revision:
Architecture revision1 and higher.
Description
This instruction swaps the bytes in a halfword or a word in the register file and stores the result to
memory. The instruction can be used for performing stores to memories of different endianness.
Operation:
I.
II.
Syntax:
I.
II.
Operands:
I.
II.
Status Flags:
Opcode:
31
31
1
15
1
1
15
1
temp[15:0] ← (Rs[7:0], Rs[15:8]);
*(Rp+SE(disp12) << 1) ← temp[15:0];
temp[31:0] ← (Rs[7:0], Rs[15:8], Rs[23:16], Rs[31:24]);
*(Rp+SE(disp12) << 2) ← temp[31:0];
stswp.h Rp[disp], Rs
stswp.w Rp[disp], Rs
{s, p} ∈ {0, 1, …, 15}
disp ∈ {-4096, -4094, ..., 4094}
{s, p} ∈ {0, 1, …, 15}
disp ∈ {-8192, -8188 ..., 8188}
Q:
V:
N:
Z:
C:
Format I:
Format II:
1
0
1
0
29
29
1
0
1
1
Not affected
Not affected
Not affected
Not affected
Not affected
12
12
28
28
1
0
11
11
Rp
Rp
25
25
24
1
24
1
1
1
1
1
disp12
disp12
0
0
20
1
20
1
19
19
Rs
Rs
AVR32
0
0
16
16
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