AT32UC3B1256 Atmel Corporation, AT32UC3B1256 Datasheet - Page 352
AT32UC3B1256
Manufacturer Part Number
AT32UC3B1256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3B0128.pdf
(684 pages)
5.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B1256
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3B1256-AUR
Manufacturer:
OMRON
Quantity:
12 000
Company:
Part Number:
AT32UC3B1256-AUT
Manufacturer:
ATMEL
Quantity:
1 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3B0128 PDF datasheet #4
- AT32UC3B0128 PDF datasheet #5
- Current page: 352 of 684
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22. USB Interface (USBB)
22.1
22.2
Table 22-1.
32059L–AVR32–01/2012
Pipe/Endpoint
Features
Overview
0
1
2
3
4
5
6
Description of USB Pipes/Endpoints
Mnemonic
Rev: 3.1.0.1.18
•
•
•
•
•
•
•
•
The Universal Serial Bus (USB) MCU device complies with the Universal Serial Bus (USB) 2.0
specification, but it does NOT feature Hi-Speed USB (480 Mbit/s).
Each pipe/endpoint can be configured in one of several transfer types. It can be associated with
one or more banks of a dual-port RAM (DPRAM) used to store the current data payload. If sev-
eral banks are used (“ping-pong” mode), then one DPRAM bank is read or written by the CPU or
the DMA while the other is read or written by the USBB core. This feature is mandatory for iso-
chronous pipes/endpoints.
Table 22-1 on page 352
PEP0
PEP1
PEP2
PEP3
PEP4
PEP5
PEP6
The theoretical maximal pipe/endpoint configuration (1600) exceeds the real DPRAM size (960).
The user needs to be aware of this when configuring pipes/endpoints. To fully use the 960 of
DPRAM, the user could for example use the configuration described in
Table 22-2.
Compatible with the USB 2.0 specification
Supports Full (12Mbit/s) and Low (1.5 Mbit/s) speed Device and Embedded Host
seven pipes/endpoints
960 of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
Up to 2 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
On-Chip transceivers including Pull-Ups/Pull-downs
On-Chip pad including VBUS analog comparator
Pipe/Endpoint
0
1
2
3
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Max. Size
256 bytes
256 bytes
64 bytes
64 bytes
64 bytes
64 bytes
64 bytes
Mnemonic
describes the hardware configuration of the USB MCU device.
PEP0
PEP1
PEP2
PEP3
Max. Nb. Banks
1
2
2
2
2
2
2
64 bytes
64 bytes
64 bytes
64 bytes
Size
DMA
N
Y
Y
Y
Y
Y
Y
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Nb. Banks
1
1
1
2
Table 22-2 on page 352
Control
Type
352
.
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