AT32UC3A464 Atmel Corporation, AT32UC3A464 Datasheet - Page 128

• Manufacturer Part Number: AT32UC3A464
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A464

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.5.4.4
32002F–03/2010
Program Trace Synchronization
Messages for taken indirect branches and exceptions include how many sequential bytes were
executed since the last taken branch or exception, and the unique portion of the branch target
address or exception vector address. The unique portion of the branch is found by doing an
exclusively or on the branch target and the last sent UADDR / FADDR. Additionally, the cause
of the indirect branch is identified through an Event ID packet. Operations causing indirect
branches and their corresponding EVT-ID are shown below.
Table 9-34.
Note that subrotine returns are often accomplished by a mov pc, lr, popm or ldm instruction with
PC included in the argument list. This generates an EVT-ID of 0 instead of 1..
Table 9-35.
This message is output by the PTU when any of the following conditions occurs:
Description
Exception entry
Subroutine call
Branch via register
contents
Return
Indirect Branch Message
Packet
Size (bits)
32
8
2
6
1. Upon exit from reset. This is required to allow the number of instruction units executed
2. When program trace is enabled during normal execution of the embedded processor.
3. Upon exit from a power-down state. This is required to allow the number of instruction
4. Upon exiting from Debug Mode.
5. An overrun condition had previously occurred in which one or more branch trace occur-
packet in a subsequent Program Trace Message to be correctly interpreted by the tool.
units executed packet in a subsequent Program Trace Message to be correctly inter-
preted by the tool.
rences were discarded by the target processor’s debug logic.To inform the tool that an
overrun condition occurred, the target outputs an Error Message (TCODE = 8) with an
Packet
Name
U-ADDR
I-CNT
EVT-ID
TCODE
Operations causing indirect branch messages
Indirect branch message without sync
Packet
Type
Variable
Variable
Fixed
Fixed
Operation
Any mov (except mov pc, lr) or load (except popm/ldm) with
PC as destination.
Any arithmetic instruction with PC as destination.
ret{cond4}, rete, rets, retj, (mov pc, lr), popm/ldm loading
PC
Exception, interrupts (0 to 3), NMI, entry to Debug Mode
acall, icall, mcall, jcall, scall, rcall instruction
Description
The unique portion of the branch target address for a taken
indirect branch or exception. Most significant bits that have a
value of 0 are truncated.
Number of bytes executed since the last taken branch.
Cause of indirect branch:
3: Exception entry
2: Call
1: Branch via register contents
0: Return
Value = 4
Direction: From target
AVR32
EVT-ID
3
2
1
0
128