AT32UC3A1128 Atmel Corporation, AT32UC3A1128 Datasheet - Page 594

• Manufacturer Part Number: AT32UC3A1128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1128

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

AT32UC3A
• EOT_IRQ_EN: End of USB Transfer Interrupt Enable
Set this bit to enable the end of usb OUT data transfer interrupt.
This interrupt is generated only if the BUFF_CLOSE_IN_EN bit is set.
Clear this bit to disable this interrupt.
• EOBUFF_IRQ_EN: End of Buffer Interrupt Enable
Set this bit to enable the end of buffer interrupt.
This interrupt is generated when the channel byte count reaches zero.
Clear this bit to disable this interrupt.
• DESC_LD_IRQ_EN: Descriptor Loaded Interrupt Enable
Set this bit to enable the Descripor Loaded interrupt.
This interrupt is generated when a Descriptor has been loaded from the system bus.
Clear this bit to disable this interrupt.
• BURST_LOCK_EN: Burst Lock Enable
Set this bit to lock the HSB data burst for maximum optimization of HSB busses bandwidth usage and maximization of fly-
by duration.
If clear, the DMA never locks HSB access.
• CH_BYTE_LENGTH: Channel Byte Length
This field determines the total number of bytes to be transferred for this buffer.
The maximum channel transfer size 64 kB is reached when this field is 0 (default value).
If the transfer size is unknown, the transfer end is controlled by the peripheral and this field should be set to 0.
This field can be written by software or descriptor loading only after the UDDMAX_STATUS.CH_EN bit has been cleared,
otherwise this field is ignored.
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