PEB3320HLV1.4 Infineon Technologies AG, PEB3320HLV1.4 Datasheet
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PEB3320HLV1.4
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PEB3320HLV1.4 Summary of contents
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... SCOUT , SICAT , SICOFI ® ® 10BaseV , 10BaseVX 10BaseS™, EasyPort™, VDSLite™ are trademarks of Infineon Technologies AG. ® Microsoft is a registered trademark of Microsoft Corporation. Linux trademark of Linus Torvalds. The information in this document is subject to change without notice. Edition 2004-05-11 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 Mü ...
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Preliminary Product Overview Revision History: Previous Version: Page Subjects (major changes since last revision) VINETIC-2CPE added Featurelist updated 2004-05-11 none Rev. 2.0 ...
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Preface This Preliminary Product Overview describes the Voice and Internet Enhanced Telephony Interface Concept (VINETIC documents, please see our webpage at http://www.infineon.com/vinetic. To simplify matters, the following synonyms are used: ® VINETIC -x: Synonym used for all codec versions VINETIC ...
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Chapter 8, Electrical Characteristics Parameters, symbols, and limit values are provided for the chip set. • Chapter 9, Application Circuits External components are identified. Illustrations of balanced ringing, unbalanced ringing, and protection circuits are included. • Chapter 10, Package ...
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Table of Contents 1 Family Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Table of Contents 8.1.1 Power Consumption VINETIC 8.1.2 Power-Up Sequence VINETIC 8.2 Operating Range SLIC-S/- ...
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List of Figures Figure 1 Block Diagram VINETIC Figure 2 P-LQFP-176-2 Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Tables ® Table 1 VINETIC -x Versions ...
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Family Overview ® The VINETIC is a family of devices for analog telephone line provision. VINETIC devices are available in different granularity ( and 8 analog voice channels) and also with different levels of DSP performance (VIP, ...
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Voice and Internet Enhanced Telephony Interface Concept ® VINETIC Executive Summary ® The VINETIC family integrates the DSP and RAM for voice processing into the codec/SLIC chip set, thereby offering a unique set of features for voice over packet: • ...
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Table 1 VINETIC -x Versions 1) Chip Set VINETIC 4VIP Product ID PEB 3324 Analog Channels 4 Echo Cancellation (G.165 G.168) 128 ms ADPCM (G.726) Yes Complex Voice Codecs Yes 2) (G.723, G.728, G.729) Fax Relay T.38 ...
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Table 2 SLIC Versions Add. positive 1 1 Voltages Technology Smart Smart Power Power 1) For broadband SLICs for the Infineon ADSL combo solution (Integrated Voice and Data IVD - GEMINAX-S PEB 4561 and GEMINAX-S MAX ...
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Table 3 VINETIC -VIP - CPE ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ...
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Table 3 VINETIC -VIP - CPE ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( Interface Features ( ( ( ( ( ( ...
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VINETIC-4x 32 MHz ANALOG- LINE- MODULE (2 channels) ANALOG- LINE- MODULE (2 channels) Figure 1 Block Diagram VINETIC Figure 1 shows the typical block diagram of a VINETIC Preliminary Product Overview PLL, 128 MHz Clock Control BUS Extended DSP (EDSP) ...
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Pin Diagram VINETIC 1.2 P-LQFP-176-2 Pin Diagram I/O D IO0D VDD33 135 GND Analog Channel D TDO/TM3 TCK/TM2 TMS/TM1 TDI/TM0 140 TDRS TEST VDD33 GND VDD18 145 TC2Q DX2 DR2 FSC PCL 150 TC1Q DX1 DR1 VDD18 GND 155 ...
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P-LBGA-176-3 Pin Diagram VSS IO1D IO3D DCPD 15 TDO/TM3 IO0D IO2D DCND 14 TCK/TM2 VDD33 TMS/TM1 CDCND 13 TDI/TMO TDRS TEST IO4D 12 VDD33 VSS VDD18 TC2Q 11 DX2 DR2 FSC PCL 10 TC1Q DX1 ...
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PG-LBGA-144 Pin Diagram (4-channel devices IO1D IO2D CDCPD 12 IO4D IO3D CDCND 11 C1D ITD DCND 10 TDRSQ TDI/TM0 TMS/TM1 9 VDD33 VDD18 TC2Q 8 DR1 DX1 FSC 7 GPIO0/ GPIO1/ GPIO2/ SCDO SCDI SCCK 6 ...
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PG-LBGA-144 Pin Diagram (2-channel devices dnc dnc dnc 12 dnc dnc dnc 11 dnc ITD dnc 10 TDRSQ TDI/TM0 TMS/TM1 9 VDD33 VDD18 dnc 8 DR1 DX1 FSC 7 GPIO0 GPIO1 GPIO2 6 VDD33 VDD18 GPIO6 ...
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Logic Symbol 4 ITx 4 Line ITACx 4 current ILx 4 VCMITx 4 DC DCPx 4 loop DCNx 4 CDCPx 4 CDCNx VCMAB VCMCD VREFAB VREFCD 4 AC ACPx 4 loop ACNx 4 Logic C1x 4 control C2x 4 ...
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Typical Applications The following applications are only a small part of the numerous possibilities when using ® the VINETIC chip set: Wireless LAN POTS lines t/r t/r optional Figure 5 Residential Gateway / ATA / VoIP Router Figure 5 ...
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Ethernet 4 POTS lines t/r t/r t/r t/r S-if (optional) S-if Figure 6 IAD serving POTS and ISDN (European Version) Figure 6 shows an highly integrated G.SHDSL Integrated Access Device (IAD). The application consists of four major blocks: the SHDSL-transceiver, ...
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Ethernet POTS lines t/r t/r Figure 7 Cable Modem / Settop Box / SMTA / EMTA ® The VINETIC chip set fulfills all requirements for packetized voice over cable (see Figure 7). The voice data is transferred in RTP packets, ...
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POTS lines t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r t/r Figure 8 Next Generation Access Network Linecard Next generation Access Networks / DLCs are using ATM or IP networks to transmit ...
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VINETIC The host interface of the VINETIC controller (PHI) which allows a flexible and easy adaption to various interface types. For programming the VINETIC parallel interface or a serial microcontroller interface can be used. Additionally VINETIC has an ...
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All parallel and serial interfaces (host interfaces) use the same (multiplexed) pins. The desired interface type is selected by means of pin strapping. Preliminary Product Overview ® VINETIC Host Interface Description 27 ® VINETIC Rev. 2.0, 2004-05-11 ...
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Codec/SLIC Features (BORSCHT Functions) 3.1 BORSCHT functions • Battery Feed The DC battery feed for the subscriber equipment has to be adapted to different applications and country specific requirements. With the VINETIC characteristic is programmable in a wide range ...
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Hybrid balancing can be programmed in the VINETIC device without any external components. • Testing In conventional solutions, testing of local loop and linecard requires a remote test unit ® and test relays. VINETIC board ...
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Line Test Capabilities The line test comprises the following functions: • Loop resistance measurement: The DC loop resistance can be determined by supplying a constant DC voltage V to the Ring- and Tip line and measuring the DC loop current ...
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Signalprocessing Capabilities of the VINETIC ® The VINETIC -VIP, -M and -C versions are equiped with an EDSP module (Enhanced Digital Signal Processor module) to perform voice and tone processing functions. The maximum available signal processing capability of the ...
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Table 4 Provided Algorithms for VINETIC Algorithm/Function G.711 Annex I (BFM) G.711 Annex II (VAD + CNG) G.726 for Coder Module (block based [11ms]) G.726 for PCM Module (sample based) G.723.1 (packet size 30 ms) G.729 A, B (packet size ...
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Programming of the VINETIC This chapter gives an overview on the command/data structure of the VINETIC devices. For further information see the User Manual Software Description. ® VINETIC uses a flexible command structure which can be used with parallel ...
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The second command word includes the offset of the register address and the number of the following data words Bit 1st word R 2nd word address offset n x data 3. Read/Write Commands ...
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Command/Data Structure in Upstream Direction In upstream direction four different data types can be distinguished: 1. Packets: Packets in upstream direction have the same command structure as packets in downstream direction, but the R/W-bit of the first command word ...
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Responses to Short Commands: Responses to short commands do not repeat the command header, because they will be provided within a given command recovery time. Therefore only the requested data will be returned. 5.3 First Command Word Bit 15 ...
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LENGTH[7:0] Number of following data words binary coded (in case of write command) or number of data words to be read (in case of read commands) respectively. 5.4.2 Second Command Word in Case of EOP, EVT and VOP Note: The ...
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DIA register. To enable a fast access to the DIA register, the DIA register can be addressed directly via the DIA command. All other registers as well as the command and packet in- and out-box can’t be addressed directly. For ...
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Operating Modes 6.1 Overview of all VINETIC ® VINETIC provides full control over the analog line status by a comprehensive set of modes that can be clustered into 7 groups: Sleep Modes Sleep Power Down Resistive ® The VINETIC ...
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This special active mode is mainly used to drive extreme long lines. As battery voltages for driving the line the delta between VHR minus VBATH (for SLIC-P VBTR) is used. Current Limitation For above active modes the SLIC-P and the ...
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GEMINAX MAX). All these modes are intended for line testing and diagnosis functions. 6.2 Automatic Modes for POTS Signaling and Power Management The following automatic modes Automatic Mode Register): 1. Automatic mode “Off-hook detection (Auto Off-hook)”: Automatic switching ...
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Firmware Architecture 7.1 Module Concept ® The VINETIC -4x has a modular firmware architecture, which is based on four different firmware module types: • PCM-Interface-module • Analog-Line-Interface-module • Coder-module • Signaling-module These modules contain the functional blocks necessary for ...
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Each module contains channels. Each channel of each module can be connected with any channel of any module via the Signal-Array. The global signal array contains the output values of each channel from every module. Each ...
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PCM-Interface Module The PCM-Interface-module supports channels. Each channel can be activated separately and supports the following features: • Decoder and encoder: G.726, G.711(without annex I and II, without CNG and VAD) • RBS/CAS filtering for enhanced ...
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Analog-Line-Module ALM ® The VINETIC -4x contains as many ALM modules as analog ports are specified for the corresponding device. The ALM module has a granularity the hardware blocks are also the same granularity. Channel one ...
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Signaling Module The Signaling-Module supports channels. Each channel supports the following features: – DTMF Receiver – 2 ATD (Answering Tone and DIS Detection ) – 2 UTD (Universal Tone and V.18 A Detection) – DTMF/AT Generation ...
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The DTMF Receiver submodule is responsible for detection of DTMF signals valid DTMF key is detected status bits are set and an interrupt is generated. The DTMF Receiver submodule has an early detection mode. This mode can be ...
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The Event Transmit Unit receives the events from the DTMF Receiver, ATD1 and ATD2, adds the event header and forwards the event to the packet out-box. The Event Play Out Unit reorders the received events and synchronize them with ...
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Coder Module The coder module supports channels and has two different interfaces. The interface for the sample based side is the signal array (decoder output and encoder input) and the packet based interface is the packet ...
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Any AGC Signals I4 I5 Signal Array Coder Output Gain 2 Figure 13 Coder Channel Module The AGC can be used to gain and to limit the level of the input signal. The limitation should prevent ...
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Test Features The following test features have been implemented: a peak detector, test loops, a MIPS meter and a version register. The peak detector can be connected with any signal from the global Signal-Array and any memory location. It ...
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Electrical Characteristics 8.1 Operating Range VINETIC GNDA GNDB GNDC Table 5 Operating Range Parameter Supply pins VDD18, VDD18i referred to the corresp. ground pins GND, GNDi ( AB CD, D, ...
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Table 5 Operating Range Parameter Digital input/output pins (I/O pins, GPIO pins) High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Input leakage current Output leakage current Input capacitance at digital signal pins (except IO0x, IO1x, IO2x, ...
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Power Consumption VINETIC T = –40 ° °C, unless otherwise stated DD18 DD18A DD18AB = 1 DD33 DD33A DD33AB ...
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Table 6 Power Consumption VINETIC Parameter Symbol Active one channel, P DDAct1, 1.8 V Power Down Resistive other channels P DDAct1, 3 Active 4 channels DDAct4, 1 DDAct4, 3 Active modes the values ...
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Note: No voltage applied to any input or output pin before the VDD33 voltages are applied. Preliminary Product Overview Electrical Characteristics 56 ® VINETIC Rev. 2.0, 2004-05-11 ...
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Operating Range SLIC-S/-S2 Table 8 Operating Range SLIC-S/-S2 Parameter 1) Battery voltage L 1) Battery voltage H Auxiliary supply voltage Total battery supply voltage V supply voltage DD Ground voltage difference BGND, AGND Voltage at pins IT ...
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Operating Range SLIC-E/-E2 Operating Rang Table 9 Parameter 1) Battery voltage L 1) Battery voltage H Auxiliary supply voltage Total battery supply voltage V supply voltage DD Ground voltage difference BGND, AGND Voltage at pins IT, IL Input range ...
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Operating Range SLIC-P Operating Ran Table 10 Parameter Symbol 1) Battery voltage L V BATL 1) V Battery voltage H BATH 1) Battery voltage R V BATR V Total battery supply DD voltage V V supply voltage DD DD ...
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Operating Range SLIC-DC Operating Ran Table 11 Parameter Supply voltage Generated battery voltage Voltage at pins IT, IL Input range DCP DCN ACP ACN Ambient temperature Junction temperature 1) Operation up to ...
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Operating Range SLIC-LCP Operating Ran Table 12 Parameter 1) Battery voltage L 1) Battery voltage H V supply voltage DD Voltage at pins IT Input range , , DCP DCN ACP ACN Ambient ...
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AC Transmission VINETIC The AC and DC parameters in ® VINETIC -x codec and x single-channel (x/2 dual-channel) SLIC chips. Table 13 AC Transmission Parameter Symbol Conditions Transmission Performance (2-wire) Return loss RL Frequency Response according to ITU-T Q.552, ...
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Table 13 AC Transmission (cont’d) Parameter Symbol Conditions Group Delay (please refer to Preliminary User’s Manual - System Reference) 1) SLIC version used in the chip set (system). Also TSLIC-S and TSLIC-E possible. 8.8 DC Characteristics T = –40 °C ...
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Table 14 DC Characteristics (cont’d) Parameter Symbol Conditions Output impedance R Harmonic distortion THD I Output current limit | I | Loop current gain – accuracy Loop current offset – 2) error Loop open resistance R TIP to BGND R ...
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Application Circuits 9.1 Internal Ringing (Balanced/Unbalanced) Internal balanced ringing is supported Vrms for systems with SLIC-E/-E2/-P and Vrms for systems with SLIC-S. SLIC-P also allows internal unbalanced ringing Vrms without ...
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Overvoltage Protection R 20 PROT TIP fuseable resistor Tip U1 BGND Ring RING R 20 PROT fuseable resistor Figure 15 Application Circuit Internal Ringing (balanced) for TSLIC-E/-S Preliminary Product Overview HRA DDA BATLA BATH BATLB ...
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Overvoltage Protection R 20 PROT TIP fuseable resistor Tip U1 Ring RING R 20 PROT fuseable resistor Figure 16 Application Circuit Internal Ringing (bal. & unbal.) for SLIC-P As Figure 16 shows, balanced and unbalanced internal ringing use the same ...
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Bill of Materials Table 15 shows the external passive components needed for a complete four channel solution with protection consisting of one VINETIC -P or two TSLIC-E/TSLIC-S devices. Table 15 External Components in Application Circuit for 4 Channels No. ...
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Application Circuits for Internal Ringing with DC/DC Figure 17 shows an example for a typical low-cost application of SLIC-DC in the P-DSO-24 package with a pnp-type switching transistor. By using a PMOS switch, efficiency could be slightly improved. The ...
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Table 16 Components for SLIC-DC Application Circuit (cont’d) Symbol Function separation on IT ITAC 1 C1 internal positive supply voltage filtering supply filtering 1 C6 switching frequency setting 1 QSW switching transistor (pnp) (1) ...
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External Ringing With SLIC-E/-E2/-P external ringing is supported, however for US market with external ringing, the SLIC-LCP is the most suitable device also provides an automatic longitudinal balance adaptation. This reduces BOM cost while maintaining a very ...
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Table 17 External Components Symbol Function . Quant 1 OVP Overvoltage Protection 2 OCP Overcurrent Protection 1) depending on overvoltage requirements 2) depending on overvoltage requirements e.g. CPC75xx TIP OCP LCAS OVP OCP RING IN IN TEST 330 Ω R ...
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Package Outlines P-DSO-20-5 (Plastic Dual Small Outline) Figure 19 SLIC-S/-S2, SLIC-E/-E2, SLIC-P (PEB 426x) Note: The P-DSO-20-5 package is designed with heatsink on top. The pin counting for this package is clockwise (top view). Attention: The heatsink is connected ...
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P-VQFN-48-4 (Plastic Very Thin Profile Quad Flat Non Leaded) Top View Figure 20 SLIC-S/-S2, SLIC-E/-E2, SLIC-P (PEB426x), SLIC-LCP (PEB 4262) Note: The P-VQFN-48-4 package is only available with heatsink on bottom. Attention: The exposed die pad and die pad edges ...
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P-DSO-36-15 (Plastic Dual Small Outline) Figure 21 TSLIC-S (PEB 4364), TSLIC-E (PEB 4365) Note: The P-DSO-36-15 package is available with heatsink on bottom. Attention: The heatslug is connected to VBATH via the chip substrate. Due to the high voltages of ...
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P-DSO-24-1, -3 (Plastic Dual Small Outline) 1.27 2) +0.15 0.35 0 15.6 -0.4 Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area ...
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P-TQFP-48-1 (Plastic Low Profile Quad Flat 0.5 5.5 0.22 ±0. Index Marking 1) Does not include plastic or metal protrusion of 0.25 max. per side Figure 23 SLIC-DC (PEB 4268) Preliminary Product Overview C ...
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P-LQFP-176-2 (Plastic Low Profile Quad Flat Package) ® Figure 24 VINETIC -4x (PEB33x4HL), VINETIC ® VINETIC -0 (PEB3320HL) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. SMD = Surface ...
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P-LBGA-176-3 (Plastic Low Profile Pitch Ball Grid Array Package) ® Figure 25 VINETIC -4x (PEB33x4E), VINETIC ® VINETIC -0 (PEB3320E) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. SMD ...
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PG-LBGA-144 (Plastic Low Profile Pitch Ball Grid Array Package) ® Figure 26 VINETIC -2CPE (PEB 3332), VINETIC (PEB 3394), VINETIC You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. SMD ...
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Terminology A A/D Analog to digital AAL2 ATM Adaption Layer 2 AC Alternative Current ADC Analog Digital Converter AITDF Advanced Integrated Test and Diagnostic Functions ATD Answering Tone Detector ATM Asynchronous Transfer Mode C CAS Channel Associated Signaling CNG ...
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ISDN Integrated Services Digital Network J JTAG Joint Test Action Group L LSSGR Local area transport access Switching System Generic Requirements N NG-DLC Next Generation Digital Loop Carrier NT Network Terminal P PBX Private Branch eXchange PCM Pulse Code Modulation ...
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VoIP Voice over IP X xDSL (all flavors of) Digital Subscriber Line Preliminary Product Overview 83 ® VINETIC Terminology Rev. 2.0, 2004-05-11 ...
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Index A Advanced Integrated Test and Diagnostic Functions 29 B Balanced ringing 65 Battery Feed 28 Broadcast bit 36 C Caller ID 12, 13, 31 Channel or resource number 36 Coding 28 Comfort Noise Generation 14 Command bits 36 ...
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Supervision 12 Technology 13 Teletax Metering 12 Testing 29 Transmission Performance 62 Transmit gain 29 TTX 29 TTX Signal Generation 62 U Universal Tone Detection 12, 13 V.90 13 Voice Activity Detection 14 Voice Compression 12 ...
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... Published by Infineon Technologies AG ...