RTL8201L RETEK, RTL8201L Datasheet

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RTL8201L

Manufacturer Part Number
RTL8201L
Description
3.3 V single port 10/100 MBPS fast ethernet phyceiver
Manufacturer
RETEK
Datasheet

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1. Features........................................................................ 2
2. General Description .................................................... 2
3. Block Diagram............................................................. 3
4. Pin Assignments .......................................................... 4
5. Pin Description ............................................................ 5
6. Register Descriptions .................................................. 7
2002-01-18
5.1 100 Mbps MII & PCS Interface ............................. 5
5.2 Serial Network Interface (SNI) .............................. 5
5.3 Clock Interface ....................................................... 5
5.4 100Mbps Network Interface................................... 6
5.5 Device Configuration Interface .............................. 6
5.6 LED Interface/PHY Address Config...................... 6
5.7 Reset and Test pins................................................. 6
5.8 Power and Ground pins .......................................... 6
6.1 Register 0 Basic Mode Control .............................. 7
6.2 Register 1 Basic Mode Status................................. 9
6.3. Register 2 PHY Identifier 1................................. 10
6.4. Register 3 PHY Identifier 2................................. 10
6.5. Register 4 Auto-negotiation Advertisement................ 11
6.6 Register 5 Auto-Negotiation Link Partner Ability.................. 12
6.7 Register 6 Auto-negotiation Expansion (ANER) . 14
6.8 Register 16 Nway Setup (NSR)....................................... 14
6.9 Register 17 Loopback, Bypass, Receiver Error Mask (LBREMR).... 15
6.10 Register 18 RX_ER Counter (REC)................... 15
6.11 Register 19 10Mbps Network Interface Configuration.......... 15
6.12 Register 20 PHY 1_1.......................................... 15
6.13 Register 21 PHY 1_2.......................................... 16
FAST ETHERNET PHYCEIVER
SINGLE PORT 10/100MBPS
REALTEK SINGLE CHIP
RTL8201(L)
1
7. Functional Description ............................................. 17
8. Electrical Characteristics ......................................... 23
9. Mechanical Dimensions ............................................ 25
6.13 Register 22 PHY 2 ............................................. 16
6.14 Register 23 Twister_1 ........................................ 16
6.15 Register 24 Twister_2 ........................................ 16
7.1 MII and Management Interface............................ 17
7.2 Auto-negotiation and Parallel Detection .............. 18
7.3 Flow control support ............................................ 18
7.4 Hardware Configuration and Auto-negotiation.............. 19
7.5 LED and PHY Address Configuration................. 20
7.6 Serial Network Interface ...................................... 20
7.7 Power Down, Link Down, Power Saving, and Isolation Modes 21
7.8 Media Interface .................................................... 21
7.9 Repeater Mode Operation .................................... 22
7.10 Reset, Power, and Transmit Bias........................ 22
8.1 D.C. Characteristics ............................................. 23
8.2 A.C. Characteristics ............................................. 24
7.8.1 100Base Tx/Rx ............................................. 21
7.8.2 10Base Tx/Rx ............................................... 22
8.1.1. Absolute Maximum Ratings ........................ 23
8.1.2. Operating Conditions................................... 23
8.1.3. Power Dissipation........................................ 23
8.1.4 Supply Voltage: Vcc ..................................... 23
8.2.1 Transmission Without Collision ................... 24
8.2.2 Reception Without Error............................... 24
RTL8201(L)
Rev.1.04

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RTL8201L Summary of contents

Page 1

REALTEK SINGLE CHIP SINGLE PORT 10/100MBPS FAST ETHERNET PHYCEIVER 1. Features........................................................................ 2 2. General Description .................................................... 2 3. Block Diagram............................................................. 3 4. Pin Assignments .......................................................... 4 5. Pin Description ............................................................ 5 5.1 100 Mbps MII & PCS Interface ............................. 5 ...

Page 2

Features The Realtek RTL8201( Fast Ethernet Phyceiver with MII interface to the MAC chip. It provides the following features: Supports MII interface Supports 10/100Mbps operation Supports half/full duplex operation IEEE 802.3/802.3u compliant Supports IEEE 802.3u clause 28 ...

Page 3

Block Diagram MII Interface 10/100 half/full Switch Logic SNI Interface TXC 25M TXD RXC 25M Serial to RXD Parrallel 2002-01-18 100M 5B 4B Data Decoder Alignment 4B 5B Encoder 10/100M Auto-negotiation Control Logic 10M TXC10 Manchester coded TXD10 waveform ...

Page 4

Pin Assignments 37. ANE 38. Duplex 39. Speed 40. RPTR/ RTT2 41. LDPS 42. RESETB 43. ISOLATE 44. MII/ SNIB 45. AGND 46. X1 47. X2 48. AVDD2 2002-01-18 RTL8201 4 RTL8201(L) 24. RXER 23. CRS 22. RXDV 21. ...

Page 5

Pin Description 5.1 100 Mbps MII & PCS Interface Symbol Type Pin(s) No. TXC O 7 TXEN I 2 TXD[3: RXC O 16 COL O 1 CRS I/O 23 RXDV O 22 RXD[3:0] O ...

Page 6

Network Interface Symbol Type Pin(s) No. TPTX TPTX RTSET I 28 TPRX TPRX 5.5 Device Configuration Interface Symbol Type Pin(s) No. ISOLATE I 43 RPTR/RTT2 I 40 SPEED I 39 ...

Page 7

... Reset Reset: This bit sets the status and control registers of the PHY in a default state. In order to reset the RTL8201L by software control, a ‘1’ must be written to bit 15 using an MII write operation. The bit clears itself after the reset process is complete, and does not need to be cleared using a second MII write ...

Page 8

... Power down 0: Normal operation 0:<10> Reserved Reserved: Ignore the output of the RTL8201L when these bits are read. 0:<9> Restart Auto Restart Auto Negotiation: Bit self-clearing bit that allows the Negotiation Nway auto-negotiation process to be restarted, regardless of the current status of the Auto-negotiation state machine. In order for this bit to have an effect, Auto-negotiation must be enabled. Writing a ‘ ...

Page 9

... If the chip is set to operate in this mode, this bit will return a ‘1’ when read. 1: Enable 10Base-T half duplex support 0: Suppress 10Base-T half duplex support 1:<10:6> Reserved Reserved: Ignore the output of the RTL8201L when these bits are read. 1:<5> Auto Auto-negotiate Complete: Bit 5 will return a ‘1’ if the Negotiation ...

Page 10

... Link Status Link Status: The RTL8201L will return a ‘1’ on bit 2 when the link state machine is in Link Pass, indicating that a valid link has been established. Otherwise, it will return ‘0’. When a link failure occurs after the link pass state has been entered, the Link Status bit will be latched at ‘ ...

Page 11

... Acknowledge reception of link partner capability data word 0: Do not acknowledge reception 4:<13> RF Remote Fault: Bit 13 returns a value of ‘1’ when the RTL8201L has detected a remote fault. The RTL8201L advertises this information, but does not act upon it. 1: Advertise remote fault detection capability 0: Do not advertise remote fault detection capability 4:< ...

Page 12

... RF Remote Fault: Bit 13 returns a value of ‘1’ when the Link Partner signals that it has detected a remote fault. The RTL8201L advertises this information, but does not act upon it. 1: Link partner is indicating a remote fault 0: Link partner does not indicate a remote fault 5:< ...

Page 13

... RTL8201L is reset. 1: 10Base-T is supported by link partner 0: 10Base-T not supported by link partner This bit will also be set after the link in 10Base is established by parallel detection and the RTL8201L Nway function is enabled but the link partner does not support Nway. 5:<4:0> Selector Selector Field: Bits 4:0 reflect the value of the Link Partner’s selector field ...

Page 14

... This register contains additional status for NWay auto-negotiation. Address Name 6:<15:5> Reserved Reserved: Ignore the output of the RTL8201L when these bits are read. This bit is always set to 0. 6:<4> MLF Multiple Link Fault: Status indicating if a multiple link fault has occurred. Bit read-only bit that gets latched high when a multiple link fault occurs in the Auto-negotiation state machine. For further details, please consult the IEEE standard. The bit is reset to ‘ ...

Page 15

Register 17 Loopback, Bypass, Receiver Error Mask (LBREMR) Address Name 17:<15> RPTR Set put the RTL8201(L) into repeater mode 17:<14> BP_4B5B Assertion of this bit allows bypassing of the 4B/5B & 5B/4B encoder. 17:<13> BP_SCR Assertion ...

Page 16

Register 21 PHY 1_2 Address Name 21:<15:0> PHY1_2 PHY 1 register (functions as RTL8139C<78>) 6.13 Register 22 PHY 2 Address Name 22<15:8> PHY2_76 PHY2 register for cable length test (functions as RTL8139C<76>) 22:<7:0> PHY2_80 PHY2 register for PLL select ...

Page 17

Functional Description The RTL8201(L) Phyceiver is a physical layer device that integrates 10Base-T and 100Base-TX functions and some extra power manage features into a 48 pin single chip which is used in 10/100 Fast Ethernet applications. This device supports ...

Page 18

Auto-negotiation and Parallel Detection The RTL8201(L) supports IEEE 802.3u clause 28 Auto-negotiation operation which can cooperate with other transceivers supporting auto-negotiation. By this mechanism, the RTL8201(L) can auto detect the link partner’s ability and determine the highest speed/duplex configuration ...

Page 19

Hardware Configuration and Auto-negotiation This section describes methods to configure the RTL8201(L) and set the auto-negotiation mode. This list will show the various pins and their setting to provide the desired result. 1) Isolate pin: Set high to isolate ...

Page 20

LED and PHY Address Configuration In order to reduce the pin count on the RTL8201, the LED pins are duplexed with the PHY address pin. Because the PHYAD strap options share the LED output pins, the external combinations required ...

Page 21

Power Down, Link Down, Power Saving, and Isolation Modes The RTL8201(L) supplies 4 kinds of Power Saving mode operation. This section will discuss all four, including how to implement each mode. The first three modes are configured through software, ...

Page 22

Tx/Rx 1) 10Base Transmit Function: The 10Base transmit function is performed as follows: The transmit 4 bits nibbles(TXD[0:3]) clocked in 2.5MHz(TXC) is first feed to parallel to serial converter, then put the 10Mbps NRZ signal to Manchester coding. ...

Page 23

Electrical Characteristics 8.1 D.C. Characteristics 8.1.1. Absolute Maximum Ratings Symbol Conditions Supply Voltage Storage Temp. 8.1.2. Operating Conditions Symbol Conditions Vcc Supply voltage TA Operating Temperature 8.1.3. Power Dissipation Symbol condition P Link down power saving mode LDPS P ...

Page 24

A.C. Characteristics 8.2.1 Transmission Without Collision Shown is an example transfer of a packet from MAC to PHY. 8.2.2 Reception Without Error Shown is an example of transfer of a packet from PHY to MAC 2002-01-18 24 RTL8201(L) Rev.1.04 ...

Page 25

Mechanical Dimensions Symbol Dimension in inch Minimal Nominal Maximum Minimal Nominal Maximum 0.067 A1 0.000 0.004 0.008 A2 0.051 0.055 0.059 b 0.006 0.009 0.011 b1 0.006 0.008 0.010 c 0.004 - 0.008 0.004 - 0.006 ...

Page 26

Realtek Semiconductor Corp. Headquarters 1F, No. 2, Industry East Road IX, Science-based Industrial Park, Hsinchu, 300, Taiwan, R.O.C. Tel : 886-3-5780211 Fax : 886-3-5776047 WWW: www.realtek.com.tw 2002-01-18 26 RTL8201(L) Rev.1.04 ...

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