MBM29LV400TC-90PFTN Fujitsu, MBM29LV400TC-90PFTN Datasheet

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MBM29LV400TC-90PFTN

Manufacturer Part Number
MBM29LV400TC-90PFTN
Description
Manufacturer
Fujitsu

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MBM29LV400TC-90PFTN-SFE
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FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
4M (512K
MBM29LV400TC
Embedded Erase
FEATURES
• Single 3.0 V read, program, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 program/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Automatic sleep mode
• Low V
• Erase Suspend/Resume
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
48-pin CSOP (Package suffix: PCV)
48-ball FBGA (Package suffix: PBT)
70 ns maximum access time
One 8K word, two 4K words, one 16K word, and seven 32K words sectors in word mode
One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase
T = Top sector
B = Bottom sector
Automatically preprograms and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
When addresses remain stable, automatically switch themselves to low power mode
Suspends the erase operation to allow a read in another sector within the same device
CC
TM
write inhibit
and Embedded Program
TM
Algorithms
TM
Algorithms
2.5 V
TM
-70/-90/-12
are trademarks of Advanced Micro Devices, Inc.
2
PROMs
8/256K
/MBM29LV400BC
16) BIT
-70/-90/-12
DS05-20862-3E
(Continued)

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