UPD17P236M1MC-5A4 NEC, UPD17P236M1MC-5A4 Datasheet
UPD17P236M1MC-5A4
Related parts for UPD17P236M1MC-5A4
UPD17P236M1MC-5A4 Summary of contents
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... Preset remote controllers, toys, and portable systems The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. U14776EJ1V0DS00 (1st edition) ...
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ORDERING INFORMATION Part Number PD17P236M1GT 28-pin plastic SOP (9.53 mm (375)) PD17P236M1MC-5A4 30-pin plastic SSOP (7.62 mm (300)) PD17P236M2GT 28-pin plastic SOP (9.53 mm (375)) PD17P236M2MC-5A4 30-pin plastic SSOP (7.62 mm (300)) PD17P236M3GT 28-pin plastic SOP (9.53 mm (375)) PD17P236M3MC-5A4 ...
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... Input port (CMOS input) or output port (N-ch open-drain output) 0 REM : Remote controller output (CMOS push-pull output) RESET : Reset input V : Power supply Resonator connection IN OUT Notes 1. This pin cannot be used. Leave open. 2. Input port or output port is selected depending on the product (see 2. FUNCTIONS). Data Sheet U14776EJ1V0DS00 30 IC2 29 P0D ...
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PROM programming mode • 28-pin plastic SOP (9.53 mm (375)) PD17P236M1GT, 17P236M2GT, 17P236M3GT, 17P236M4GT (L) (Open (Open) CLK GND (L) (Open ...
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... PP (L) (Open (Open) CLK GND (L) (Open) (Open) Caution Contents in parentheses indicate how to handle unused pins in PROM programming mode Connect to GND via a resistor (470 Open : Leave unconnected. CLK : Clock input for PROM Data input/output for PROM 0 7 GND : Ground MD -MD ...
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BLOCK DIAGRAM P0A 0 P0A 1 P0A P0A 2 P0A 3 P0B ( P0B ( P0B P0B ( P0B ( P0C ( P0C (D ) ...
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DIFFERENCES BETWEEN PD17236 AND PD17P236 ........................................................... 2. PIN FUNCTIONS ........................................................................................................................... 2.1 Normal Operation Mode .................................................................................................................... 2.2 PROM Programming Mode ............................................................................................................... 2.3 Input/Output Circuits ......................................................................................................................... 2.4 Processing of Unused Pins .............................................................................................................. 2.5 Notes on Using the RESET and INT Pins ...
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DIFFERENCES BETWEEN PD17236 AND PD17P236 PD17P236 is equipped with PROM to which data can be written by the user instead of the internal mask ROM (program memory) of the PD17236. Table 1-1 shows the differences between the PD17236 and ...
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... REM Outputs transfer signal for infrared remote controller. Active-high output. 9 (9) V Power supply DD 10 (10) X Connects ceramic resonator for system clock oscillation OUT 11 (11 (12) GND Ground 13 (13) RESET Turns ON pull down resistor if POC or watchdog timer overflows and if the stack pointer overflows or underflows, and resets the system ...
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Normal Operation Mode (2/2) Pin No. Symbol 23 (24) P0C These pins constitute a 4-bit I/O port that can be set in the input (25) P0C output mode in 4-bit units (group I/O (26) ...
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Input/Output Circuits The equivalent input/output circuit for each PD17P236 pin is shown below. (1) P0A V DD Input buffer (2) P0B, P0C, P0D Output Data latch Output disable Selector Input buffer (3) P0E Pull-up Data register V Output Data ...
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... For example, if the wiring length of the RESET or INT pin is too long, noise superimposed on the wiring line of the pin may cause the above problem. Therefore, keep the wiring length of these pins as short as possible to suppress the noise; otherwise, take noise preventive measures as shown below by using external components. Connect diode with low V between V F and RESET/INT pin ...
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... PD17P236 has been in the reset status (V PP time. In this mode, the operating modes shown in Table 3-2 can be set by setting the MD all the pins other than those shown in Table 3-1 unconnected or connect them to GND via pull-down resistor (470 ). (See PIN CONFIGURATION (2) PROM programming mode.) Table 3-2 ...
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Program Memory Writing Procedure The program memory is written at high speed in the following procedure. (1) Pull down the pins not used to GND via resistor. Keep the CLK pin low. (2) Supply the V ...
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Program Memory Reading Procedure (1) Pull down the pins not used to GND via resistor. Keep the CLK pin low. (2) Supply the V pin. Keep the V DD (3) Supply the V ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Item Symbol Supply voltage V DD PROM power supply V PP Input voltage V I Output voltage V O Note High-level output current I OH Note Low-level output current ...
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Recommended Operating Ranges (T Item Symbol Supply voltage V DD1 V DD2 V DD3 V DD4 Oscillation frequency f X Operating temperature T A Note Low-voltage detector circuit t CY Note Reset if the status 2.05 V ...
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... IN OUT Notes 1. The oscillation frequency only indicates the oscillator characteristics. 2. The oscillation stabilization time is necessary for oscillation to be stabilized, after V STOP mode release. Caution To use a system clock oscillator circuit, perform the wiring in the area enclosed by the dotted line in the above figure as follows, to avoid adverse wiring capacitance influences: • ...
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DC Characteristics (T = – Item Symbol High-level input voltage V P1A IHI1 0 V P0A, P0B, P0C, P0D IH2 V P0E IH3 Low-level input voltage V P1A IL1 0 V P0A, P0B, P0C, P0D ...
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... RESET low level lwidth t RSL Note The CPU clock cycle time (instruction execution time) is determined by the oscillation frequency of the resonator connected and SYSCK (RF: address 02H) of the register file. The figure on the right shows the CPU clock cycle time t vs. supply voltage V characteristics. ...
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... MD data output float delay time 3 Reset setup time Note The internal address increment (+1) is performed on the fall of the 3rd clock, where 4 clocks compreise one cycle. The internal clock is not connected to a pin 6.0 0. 12.5 0 Conditions MIN. Other than CLK ...
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Program Memory Write Timing t RES t VPS GND t VDS GND CLK Hi Data input ...
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PACKAGE DRAWING 28-PIN PLASTIC SOP (9.53 mm (375 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 15 detail of ...
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PLASTIC SSOP (7.62 mm (300 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition detail of lead end F ...
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... After opening the dry pack, store less and 6 less for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). Soldering Conditions Note (after that, prebaking is (after that, prebaking is necessary at 125 C for 10 hours) (after that, prebaking is necessary at 125 C for 10 hours) Data Sheet U14776EJ1V0DS00 PD17P236 Symbol IR35-107-2 VP15-107-2 WS60-107-1 — ...
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... After opening the dry pack, store less and 6 less for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). 26 Soldering Conditions Note (after that, prebaking is Note (after that, prebaking is (after that, prebaking is necessary at 125 C for 10 hours) Data Sheet U14776EJ1V0DS00 PD17P236 Symbol IR35-103-2 VP15-103-2 WS60-103-1 — ...
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... Emulation probe EP-17K30GS is an emulation probe for 17K series 30-pin SSOP (MC-5A4). When used (EP-17K30GS) with EV-9500GT-30 Conversion adapter The EV-9500GT- conversion adapter for the 28-pin SOP (GM-375B used to connect Note 2 (EV-9500GT-28 ) the EP-17K28GT and target system. Conversion adapter The EV-9500GT- conversion adapter for the 30-pin SSOP (MC-5A4) ...
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Software Name Outline 17K assembler The RA17K is an assembler common (RA17K) to the 17K series products. When developing the program of devices, RA17K is used in combination with a device file (AS17235). Device file The AS17235 is a device ...
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... HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry ...
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... Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: • Device availability • Ordering information • ...
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... The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. ...
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... NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others ...