KM681000BLTI-7L Samsung, KM681000BLTI-7L Datasheet

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KM681000BLTI-7L

Manufacturer Part Number
KM681000BLTI-7L
Description
128K x 8 bit CMOS static RAM, 70ns, low low power
Manufacturer
Samsung
Datasheet
N.C
I/O
I/O
I/O
A
A
A
V
A
A
A
A
A
A
A
A
SS
16
14
12
7
6
5
4
3
2
1
0
1
2
3
KM681000B Family
128K x8 bit Low Power CMOS Static RAM
FEATURES
¡ Ü
¡ Ü
¡ Ü
¡ Ü
¡ Ü
¡ Ü
PIN DESCRIPTION
PRODUCT FAMILY
KM681000BL
KM681000BL-L
KM681000BLE
KM681000BLE-L
KM681000BLI
KM681000BLI-L
Power Supply Voltage : Single 5.0V ¡ ¾ 10%
Process Technology : 0.6
Organization : 128Kx8
Low Data Retention Voltage : 2V(Min)
Package Type : JEDEC Standard
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Three state output and TTL Compatible
32-SOP
32-DIP
Product
Family
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
32-DIP, 32-SOP, 32-TSOP I R/F
V
A
CS
WE
A
A
A
A
OE
A
CS
I/O
I/O
I/O
I/O
I/O
CC
15
13
8
9
11
10
8
7
6
5
4
2
1
CS
CS
WE
WE
V
NC
V
NC
A
A
A
Extended(-25~85 ¡ É )
A
A
A
A
A
A
A
A
A
Industrial(-40~85 ¡ É )
Commercial(0~7 ¡ É )
A
A
A
A
A
A
A
A
A
A
A
A
CC
CC
14
13
11
13
15
14
12
12
16
15
11
16
9
7
4
5
6
7
9
8
2
6
5
4
2
8
§ -
Temperature
Operating
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CMOS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Type I - Forward
Type I-Reverse
32-TSOP
32-TSOP
70/100ns
70/100ns
55/70ns
Speed
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
OE
A
CS
I/O
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
A
A
A
A
A
A
A
A
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
I/O
CS
A
OE
10
SS
0
1
2
3
3
2
1
0
SS
10
8
7
6
5
4
3
2
1
1
1
2
3
4
5
6
7
8
1
32-DIP,32-SOP
32-TSOP I R/F
32-SOP
32-TSOP I R/F
32-SOP
32-TSOP I R/F
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
CMOS process technology. The family can support various
operating temperature ranges and have various package types
for user flexibility of system design. The family also support low
data retention voltage for battery back-up operation with low
data retention current.
The KM681000B family is fabricated by SAMSUNG's advanced
PKG Type
A
A
A
0~3,
4~7,
12~16
I/O
CS
A
A
Name
8~11
0
1
Vcc
Vss
N.C
WE
OE
1
~A
~I/O
I/O
,CS
16
1
18
~
2
8
(I
Standby
SB1
Function
Address Inputs
Write Enable Input
Chip Select Inputs
Output Enable Input
Data Inputs/Outputs
Power
Ground
No Connection
100
100
100
20
50
50
, Max)
Y-Decoder
§ Ë
§ Ë
§ Ë
I/O Buffer
§ Ë
§ Ë
§ Ë
Power Dissipation
Cell
Array
PRELIMINARY
CMOS SRAM
Operating
(I
70mA
Revision 0.3
CC2
April 1996
CS
WE
)
1
,
,CS
OE
2

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KM681000BLTI-7L Summary of contents

Page 1

... A 11 GENERAL DESCRIPTION The KM681000B family is fabricated by SAMSUNG's advanced CMOS process technology. The family can support various operating temperature ranges and have various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up operation with low data retention current ...

Page 2

... Function KM681000BLGI-7 32-SOP,70ns,L-pwr KM681000BLGI-7L 32-SOP,70ns,LL-pwr KM681000BLGI-10 32-SOP,100ns,L-pwr KM681000BLGI-10L 32-SOP,100ns,LL-pwr KM681000BLTI-7 32-TSOP F,70ns,L-pwr KM681000BLTI-7L 32-TSOP F,70ns,LL-pwr KM681000BLTI-10 32-TSOP F,100ns,L-pwr KM681000BLTI-10L 32-TSOP F,100ns,LL-pwr KM681000BLRI-7 32-TSOP R,70ns,L-pwr KM681000BLRI-7L 32-TSOP R,70ns,LL-pwr KM681000BLRI-10 32-TSOP R,100ns,L-pwr ...

Page 3

KM681000B Family ABSOLUTE MAXIMUM RATINGS Item Voltage on any pin relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage temperature Operating Temperature Soldering temperature and time * Stresses greater than those listed under "Absolute Maximum Ratings" ...

Page 4

KM681000B Family DC AND OPERATING CHARACTERISTICS Item Input leakage current Output leakage current Operating power supply current Average operating current Output low voltage Output high voltage Standby Current(TTL) KM681000BL KM681000BL-L Standby KM681000BLE Current (CMOS) KM681000BLE-L KM681000BLI KM681000BLI Commercial ...

Page 5

KM681000B Family TEST CONDITIONS (2. Temperature and Vcc Conditions) Product Family Temperature KM681000BL/L-L 0~70 ¡ É -25~85 ¡ É KM681000BLE/LE-L KM681000BLI/LI-L -40~85 ¡ É PARAMETER LIST FOR EACH SPEED BIN Parameter List Read Read cycle time Address access time Chip ...

Page 6

KM681000B Family DATA RETENTION CHARACTERISTICS Item Vcc for data retention V DR Data retention current I DR Data retention set-up time t RDR Recovery time t RDR = ¡ É , unless otherwise specified * 1) Commercial Product ...

Page 7

KM681000B Family TIMMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE (1) (CS =OE WE Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE Address Data ...

Page 8

KM681000B Family TIMING WAVEFORM OF WRITE CYCLE (1) Address Data in Data out Data Undefined TIMING WAVEFORM OF WRITE CYCLE (2) Address Data in Data out (WE Controlled ...

Page 9

KM681000B Family TIMING WAVEFORM OF WRITE CYCLE (2) Address CS1 CS2 WE Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of low CS going low. A write ends at the earliest transition among CS ...

Page 10

KM681000B Family PACKAGE DIMENSIONS 32 DUAL INLINE PACKAGE (600mil) #32 13.60 ¡ ¾ 0.20 0.535 ¡ ¾ 0.008 #1 1. 0.075 32 PLASTIC SMALL OUTLINE PACKAGE (525mil) # 0.016 0.028 42.31 MAX 1.666 4.191 ...

Page 11

KM681000B Family PACKAGE DIMENSIONS 32 THIN SMALL OUTLINE PACKAGE TYPE I (0820F) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #1 0.50 0.0197 #16 0.25 TYP 0.010 0~8 ¡ É 0.45 ~0.75 0.018 ~0.030 32 THIN SMALL OUTLINE PACKAGE TYPE I (0820R) ...

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