ISPLSI2064V-80LT100 Lattice Semiconductor Corp., ISPLSI2064V-80LT100 Datasheet
ISPLSI2064V-80LT100
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ISPLSI2064V-80LT100 Summary of contents
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... Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms Copyright © 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. ...
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Functional Block Diagram Figure 1. ispLSI 2064V Functional Block Diagram (64-I/O and 32-I/O Versions) Input Bus Output Routing Pool (ORP) Megablock I I/O 2 I/O 3 I/O 4 I/O 5 Global Routing Pool ...
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Absolute Maximum Ratings Supply Voltage V cc ................................................... Input Voltage Applied ..................................... -0.5 to +5.6V Off-State Output Voltage Applied .................. -0.5 to +5.6V Storage Temperature ..................................... -65 to 150 C Case Temp. with Power Applied .................... -55 to 125 C ...
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Switching Test Conditions Input Pulse Levels Input Rise and Fall Time 10% to 90% Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (see Figure 2) TEST ...
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External Timing Parameters 4 TEST 2 PARAMETER # COND Data Propagation Delay, 4PT Bypass, ORP Bypass pd1 Data Propagation Delay pd2 Clock Frequency with Internal Feedback max f max (Ext.) – ...
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Internal Timing Parameters 2 PARAMETER # Inputs t 20 Input Buffer Delay io t din 21 Dedicated Input Delay GRP t 22 GRP Delay grp GLB Product Term Bypass Path Delay (Combinatorial) 4ptbpc Product ...
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Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset #43, 44 Y0,1,2 GOE 0 Derivations of su, h and co from the Product Term Clock Logic ...
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Power Consumption Power consumption in the ispLSI 2064V device depends on two primary factors: the speed at which the device is operating and the number of Product Terms used. Figure 3. Typical Device Power Consumption vs fmax I CC can ...
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Pin Description 84-PIN PLCC NAME PIN NUMBERS I I/O 3 26, 27, 28, I I/O 7 30, 31, 32, I I/O 11 34, 35, 36, I I/O 15 38, 39, 40, I/O ...
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Pin Description 44-PIN PLCC NAME PIN NUMBERS I I/O 3 15, 16, 17, I I/O 7 19, 20, 21, I I/O 11 25, 26, 27, I I/O 15 29, 30, 31, I/O ...
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Pin Configuration ispLSI 2064V 100-Pin TQFP Pinout Diagram RESET 11 VCC ...
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Pin Configuration ispLSI 2064V 84-Pin PLCC Pinout Diagram I I I/O 60 ...
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Pin Configuration ispLSI 2064V 44-Pin PLCC Pinout Diagram I/O 28 I/O 29 I/O 30 I/O 31 GOE1/Y0 VCC ispEN TDI/IN 0 I/O 0 I/O 1 I/O 2 Pin Configuration ispLSI 2064V 44-Pin TQFP Pinout Diagram I/O 28 I/O 29 I/O ...
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Part Number Description ispLSI Device Family Device Number Speed f 100 = 100 MHz max MHz max MHz max ispLSI 2064V Ordering Information FAMILY fmax (MHz) tpd (ns) 100 7.5 100 7.5 ...