82541GI Intel Corporation, 82541GI Datasheet
82541GI
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82541GI Summary of contents
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... Family of Gigabit Ethernet Controllers 82541PI, 82541GI, and 82541EI Networking Silicon Datasheet Revision 3.1 March 2004 ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel's website at http://www.intel.com. Copyright © 2004, Intel Corporation *Third-party brands and names are the property of their respective owners. ii 3.1 Included minor information for oscillator support in Section 3.5.1, “ ...
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Contents 1.0 Introduction ...................................................................................................................... 1 1.1 Document Scope................................................................................................... 1 1.2 Reference Documents........................................................................................... 2 1.3 Block Diagram ....................................................................................................... 3 2.0 Features of the 82541 Family of Gigabit Ethernet Controllers..................................... 5 2.1 PCI Features ......................................................................................................... 5 2.2 MAC Specific Features.......................................................................................... 5 2.3 ...
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Family of Gigabit Ethernet Controllers 4.5.1 PCI Bus Interface ................................................................................... 24 4.5.2 Link Interface Timing .............................................................................. 28 4.5.3 EEPROM Interface................................................................................. 29 5.0 Package and Pinout Information .................................................................................. 31 5.1 Package Information ........................................................................................... 31 5.2 Thermal Specifications........................................................................................ 33 5.3 Pinout ...
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... Gigabit Ethernet Controller. 1.1 Document Scope The 82541EI is the original device and is now being manufactured in a B-0 stepping. The 82541GI (B-1 stepping) and 82541PI (C-0 stepping) are pin compatible, however, a different Intel software driver is required from the 82541EI. This document contains datasheet specifications for the 82541PI/GI/EI Gigabit Ethernet Controllers including signal descriptions, DC and AC parameters, packaging data, and pinout information ...
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... The following documents provide additional information: • 82540EP/82541EI & 825462EZ(EX) Dual Footprint Design Guide, AP-444. Intel Corporation. • 82547GI(EI)/82541GI(EI)/82541ER EEPROM Map and Programming Information Guide, AP-446. Intel Corporation. • PCI Local Bus Specification, Revision 2.3. PCI Special Interest Group (SIG). • ...
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Block Diagram Slave Access Logic Control Status Logic Statistics ECHO, NEXT, FEXT Cancellers AGC, A/D Timing Recovery Hybrid Media Dependent Interface Figure 1. 82541PI/GI/EI Block Diagram Datasheet 82541 Family of Gigabit Ethernet Controllers PCI Core DMA Function Descriptor Management ...
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Family of Gigabit Ethernet Controllers Note: This page is intentionally left blank. 4 Datasheet ...
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Features of the 82541 Family of Gigabit Ethernet Controllers 2.1 PCI Features PCI Revision 2.3 support for 32-bit wide interface at 33 MHz and 66 MHz Algorithms that optimally use advanced PCI, MWI, MRM, and MRL commands CLKRUN# Signal ...
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Family of Gigabit Ethernet Controllers 2.3 PHY Specific Features Integrated PHY for 10/100/1000 Mbps operation IEEE 802.3ab Auto-Negotiation support IEEE 802.3ab PHY compliance and compatibility State-of-the-art DSP architecture implements digital adaptive equalization, echo cancellation, and cross- talk cancellation Automatic ...
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Manageability Features Manageability features: • SMB port • Alerting Standards Format 1.0 and 2.0 • Advanced Power Management (Wake on LAN) • Advanced Configuration and Power Interface (ACPI) On-board SMB port Compliance with PCI Power Management 1.1 and ACPI ...
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Family of Gigabit Ethernet Controllers 2.7 Technology Features 196-pin Ball Grid Array (BGA) package Pin compatible with 82551QM, 82540EM and 82540EP controllers µ Implemented in 0.13 0° 70° C (maximum) operating ambient temperature Heat sink or forced ...
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Signal Descriptions 3.1 Signal Type Definitions The signals of the 82541PI/GI/EI controller are electrically defined as follows: Name I Input. Standard input only digital signal. O Output. Standard output only digital signal. TS Tri-state. Bi-directional tri-state digital input/output signal. ...
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Family of Gigabit Ethernet Controllers 3.2.1 PCI Address, Data and Control Signals (44) Symbol Type AD[31:0] TS CBE[3:0]# TS PAR TS FRAME# STS IRDY# STS TRDY# STS STOP# STS 10 Name and Function Address and Data. Address and data ...
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Symbol Type IDSEL# I DEVSEL# STS VIO P 3.2.2 Arbitration Signals (2) Symbol Type REQ# TS GNT# I 3.2.3 Interrupt Signal (1) Symbol Type INTA# TS 3.2.4 System Signals (4) Symbol Type CLK I M66EN I RST# I I/O CLKRUN# ...
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Family of Gigabit Ethernet Controllers 3.2.5 Error Reporting Signals (2) Symbol Type SERR# OD PERR# STS 3.2.6 Power Management Signals (3) Symbol Type LAN_ I PWRGD PME# OD AUXPWR I 3.2.7 SMB Signals (3) Symbol Type TS SMBCLK OD ...
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EEPROM and Serial FLASH Interface Signals (9) Symbol Type EE_MODE I EE_DI O EE_DO I EE_CS O EE_SK O FLSH_CE# O FLSH_SCK O FLSH_SI O FLSH_SO/ I LAN_DISABLE# 3.4 Miscellaneous Signals 3.4.1 LED Signals (4) Symbol LED0 / LINKUP# ...
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Family of Gigabit Ethernet Controllers 3.4.2 Other Signals (4) Symbol Type SDP[3:0] TS PHY Signals 3.5 3.5.1 Crystal Signals (2) Symbol Type XTAL1 I XTAL2 O Note: The 82541 clock input circuit is optimized for use with an external ...
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MDI[3]+/- A IEEE_TEST- A IEEE_TEST+ A 3.6 Test Interface Signals (6) Symbol TEST JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST# 3.7 Power Supply Connections 3.7.1 Digital and Analog Supplies Symbol Type 3.3V P Analog_1.8V P CLKR_1.8V P XTAL_1.8V P 1.2V P Analog_1.2V ...
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Family of Gigabit Ethernet Controllers 3.7.2 Grounds, Reserved Pins and No Connects Symbol Type VSS P AVSS P RSVD_VSS P RSVD_NC 3.7.3 Voltage Regulation Control Signals (2) Symbol Type CTRL_12 A CTRL_18 A 16 Name and ...
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Voltage, Temperature, and Timing Specifications 4.1 Absolute Maximum Ratings Table 1. Absolute Maximum Ratings Symbol DC supply voltage on 3.3 V pins VDD (3.3) with respect to VSS DC supply voltage on 1.8 V pins VDD (1.8) with respect ...
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Family of Gigabit Ethernet Controllers Table 2. Recommended Operating Conditions (Sheet Symbol tr/tf input rise/fall time (Schmitt input) Operating temperature range T A (ambient) T Junction temperature J a. Sustained operation of the device at conditions ...
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Table 4. 1.8V Supply Voltage Ramp Input Capacitance range when using PNP circuit Capacitance Capacitance Equivalent series resistance of output ESR capacitance Ictrl_18 Maximum output current rating to CTRL_18 a. Good design practices achieve voltage ramps to within the regulation ...
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Family of Gigabit Ethernet Controllers a. The value listed in this table is for external voltage regulation. If the internal voltage regulator is used, the minimum value is 1. The value listed in this table is for ...
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Table 9. Power Specifications D(r) Uninitialized Device Power Table 10. Power Specifications - Complete Subsystem Complete Subsystem (Reference Design) Including Magnetics, LED, Regulator Circuits D3cold - wake disabled Typ Max Icc Icc a (mA) (mA) 3 1.8 V ...
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Family of Gigabit Ethernet Controllers Table 11. I/O Characteristics (Sheet (Continued) Symbol Parameter Input current Input with pull- down resistor (50 IIN KΩ) Inputs with pull-up resistor (50 KΩ) Output low IOL current Output high IOH ...
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Table 13. 25 MHz Clock Input Requirements Symbol f0 Frequency df0 Frequency variation Dc Duty cycle tr Rise time tf Fall time Jptp Clock jitter (peak-to-peak) Cin Input capacitance T Operating temperature Aptp Input clock amplitude (peak-to-peak) Vcm Clock common ...
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Family of Gigabit Ethernet Controllers Table 16. EEPROM Interface Clock Requirements Symbol Microwire EEPROM Clock fSK SPI EEPROM Clock Table 17. AC Test Loads for General Output Pins Symbol CL TDO CL PME#, SDP[3:0] CL EE_DI, EE_SK CL LED[3:0] ...
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Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate must be met across the minimum peak-to-peak portion of the clock waveform as shown. b. The minimum RST# slew rate applies ...
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Family of Gigabit Ethernet Controllers PCI_CLK Output Delay Tri-State Output Figure 2. PCI Bus Interface Output Timing Measurement PCI_CLK Input Figure 3. PCI Bus Interface Input Timing Measurement Condition Table 20. PCI Bus Interface Timing Measurement Conditions Symbol VTH ...
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Figure 4. TVAL (max) Rising Edge Test Load Figure 5. TVAL (max) Falling Edge Test Load Figure 6. TVAL (minimum.) Test Load Datasheet 82541 Family of Gigabit Ethernet Controllers Pin 1/2 inch max. 25 Pin 1/2 inch max ...
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Family of Gigabit Ethernet Controllers NOTE load used for maximum times. Minimum times are specified with 0 pF load. Figure 7. TVAL Test Load (PCI 5 V Signaling Environment) 4.5.2 Link Interface Timing Table 21. Rise and ...
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EEPROM Interface Table 22. Link Interface Clock Requirements Symbol Microwire EE_SK pulse width TPW SPI EE_SK pulse width a. The EEPROM clock is derived from a 125 MHz internal clock. Table 23. Link Interface Clock Requirements Symbol TDOS EE_DO ...
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Family of Gigabit Ethernet Controllers Note: This page is intentionally left blank. 30 Datasheet ...
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Package and Pinout Information This section describes the 82541PI/GI/EI device physical characteristics. The pin number-to-signal mapping is indicated beginning with 5.1 Package Information The 82541PI/GI/EI device is a 196-lead plastic ball grid array (BGA) measuring 15mm. ...
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Family of Gigabit Ethernet Controllers Figure 12. 196 PBGA Package Pad Detail As illustrated in Figure 12, the Ethernet controller package uses solder mask defined pads. The copper area is 0.60mm and the opening in the solder mask is ...
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Thermal Specifications The 82541PI/GI/EI device is specified for operation when the ambient temperature (T ° the range (case temperature) is calculated using the equation (θ ...
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Family of Gigabit Ethernet Controllers 5.3 Pinout Information Table 14. PCI Address, Data and Control Signals Signal PCI_AD[0] PCI_AD[1] PCI_AD[2] PCI_AD[3] PCI_AD[4] PCI_AD[5] PCI_AD[6] PCI_AD[7] PCI_AD[8] PCI_AD[9] PCI_AD[10] PCI_AD[11] PCI_AD[12] PCI_AD[13] PCI_AD[14] PCI_AD[15] Table 15. PCI Arbitration Signals Signal ...
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Table 18. Error Reporting Signals Signal SERR# Table 19. Power Management Signals Signal PME# LAN_PWRGD Table 20. SMB Signals Signal SMBCLK Table 21. Serial EEPROM Interface Signals Signal EE_SK EE_DO Table 22. Serial FLASH Interface Signals Signal FLSH_SCK FLSH_SO/LAN_DISABLE# Table ...
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Family of Gigabit Ethernet Controllers Table 24. Other Signals Signal SDP0 SDP1 Table 25. IEEE Test Signals Signal IEEE_TEST- Table 26. PHY Signals Signal MDI0- MDI0+ MDI1- MDI1+ Table 27. Test Interface Signals Signal JTAG_TCK JTAG_TDI Table 28. Digital ...
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Table 28. Digital Power Signals (Sheet (Continued) Signal 3.3V 3.3V Table 29. Analog Power Signals Signal Analog_1.2V Analog_1.2V Analog_1.2V Analog_1.2V Table 30. Grounds and No Connect Signals Signal Pin VSS B3 VSS B7 VSS C10 VSS D5 ...
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Family of Gigabit Ethernet Controllers Table 32. Signal Names in Pin Order (Sheet Signal Name NC SERR# 3.3V IDSEL PCI_AD[25] PME# 3.3V PCI_AD[30] LAN_PWRGD SMBCLK 3.3V LED0 / LINKUP# TEST NC PCI_AD[22] PCI_AD[23] VSS PCI_AD[24] PCI_AD[26] ...
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Table 32. Signal Names in Pin Order (Sheet (Continued) PCI_AD[28] PCI_AD[29] CLK_RUN# SMBDATA VSS LED1 / ACT# AVSS MDI0+ MDI0- PCI_AD[18] PCI_AD[19] PCI_AD[20] RSVD_VSS VSS VSS VSS VSS NC NC Analog_1.8V CLKR_1.8V AVSS IEEE_TEST- 3.3V VSS PCI_AD[17] ...
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Family of Gigabit Ethernet Controllers Table 32. Signal Names in Pin Order (Sheet (Continued) MDI1- IRDY# FRAME# CBE2# VSS VSS VSS VSS VSS VSS VSS AVSS RSVD_NC MDI2+ MDI2- CLK VIO TRDY# PLL_1.2V 1.2V 1.2V VSS ...
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Table 32. Signal Names in Pin Order (Sheet (Continued) 1.2V VSS VSS Analog_1.2V NC MDI3+ MDI3- PAR PERR# GNT# EE_MODE 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V AUX_PWR XTAL_1.8V XTAL2 PCI_AD[16] VSS 3.3V 3.3V 1.2V 1.2V 1.2V ...
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Family of Gigabit Ethernet Controllers Table 32. Signal Names in Pin Order (Sheet (Continued) PCI_AD[15] CBE1# 1.2V 1.2V VSS RSVD_NC NC 1.2V 1.2V VSS JTAG_TMS JTAG_TRST# JTAG_TCK PCI_AD[11] PCI_AD[12] PCI_AD[13] CBE0# PCI_AD[5] VSS PCI_AD[1] RSVD_NC FLSH_CE_N# ...
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Table 32. Signal Names in Pin Order (Sheet (Continued) EE_DO RSVD_NC VSS SDP2 SDP0 NC 3.3V PCI_AD[8] PCI_AD[6] PCI_AD[3] PCI_AD[2] EE_CS VSS FLSH_SO EE_DI CTRL_12 3.3V SDP1 NC Datasheet 82541 Family of Gigabit Ethernet Controllers N10 N11 ...
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Family of Gigabit Ethernet Controllers 5.4 Visual Pin Assignments IEEE 14 NC MDI- [0] IEEE TEST- TEST+ 13 TEST CTRL18 MDI+ [0] AVSS LINK 12 LINK UP# AVSS CLKR 1.8V 1000# LINK Analog 11 3.3V ...