SAA7131E NXP Semiconductors, SAA7131E Datasheet
SAA7131E
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SAA7131E Summary of contents
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... TV Rev. 03 — 19 May 2008 1. General description The SAA7131E combines a digital global standard low-IF demodulator for analog TV with a PCI audio and video decoder. The IF demodulator is an alignment-free digital multistandard vision and sound low-IF signal PLL demodulator for positive and negative video modulation. It can be used worldwide for M/N, B/G/H, I, D/K and L/L’ ...
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... Two 10-bit DACs on-chip for CVBS and SSIF/audio I Internal PLL synthesizer which permits to use a low-cost crystal (typically 16 MHz) SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Input of external audio reference clock, e.g. 24.576 MHz I Output of audio master clock (768 SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder 2 C-bus 2 C-bus switch 2 C-bus addresses selectable through 2 external pins Rev. 03 — 19 May 2008 SAA7131E f , 512 f , 384 f or 256 selectable). s © ...
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... Data broadcast receiver I Media hub for home server. SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder 2 C-bus EEPROM 2 S-bus for channels Rev. 03 — 19 May 2008 SAA7131E 2 C-bus) for stand-alone © NXP B.V. 2008. All rights reserved ...
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... LBGA256 SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder Description plastic low profile ball grid array package; 256 balls; body 17 Rev. 03 — 19 May 2008 SAA7131E Version SOT740-2 © NXP B.V. 2008. All rights reserved ...
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... STEREO DAC DSP NICAM DECODER BTSC EIAJ FM A2 DECODER AM DECODER FORMAT DIGITAL VIDEO VIDEO MATRIX CLIPPING COMB FILTER SCALER GAMMA FORMAT DECODER FORMAT SAA7131E IF DEMODULATOR PART 10-BIT CVBS out DAC 10-BIT SIF out DAC AUDIO audio stereo OUTPUT output MUX 2 I S-bus 2 ...
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... SSA2 TDII 7 TRSTI_N 11 GPIO3 DDA2 V 7 SSD1 TCKD 11 GPIO7 DDA2 V 7 SSD2 RIGHT1 11 GPIO11 15 Rev. 03 — 19 May 2008 SAA7131E SAA7131E 001aaf238 Transparent top view Symbol Pin XTALII 4 IF_AGC 8 SCLI 12 GPIO0 DDA1 TDOI ...
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... V 7 SSA3 V 11 SSD3 V 15 DDD3 V 3 SSA3 V 7 SSA3 V 11 SSD3 AD[2] 15 CV4 SSA3 V 11 SSD3 AD[5] 15 Rev. 03 — 19 May 2008 SAA7131E Symbol Pin Symbol SSD1 SSD1 SSA3 REF2A REF0 SSA3 GPIO16 16 GPIO17 DDA2 DDA1 SSA3 ...
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... AD[17 AD[15] 14 [1] i.c.: internally connected; leave open. 6.2 Pin description The SAA7131E is packaged in a rectangular plastic ball grid array package with 256 pins (LBGA256); see Table 3. Pin category Power supply pins JTAG test interface pins (for boundary scan test) Digital control pins 2 I C-bus slave interface pins ...
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... I test mode select input: tie HIGH or let float for normal operation I test clock input: drive LOW for normal operation I test reset input: drive LOW for normal operation 13. Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... A output: this pin is an open-drain interrupt output, OD conditions assigned by the interrupt register PI PCI reset input: will 3-state all PCI pins (active LOW) PI PCI grant input: the SAA7131E is granted to master access PCI-bus (active LOW) PO PCI request output: the SAA7131E requests master access to PCI-bus (active LOW) PIO and ...
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... PI PCI clock input: reference for all bus transactions 33.33 MHz PI initialization device select input: this input is used to select the SAA7131E during configuration read and write transactions PIO and target ready input or output: driven by the addressed target, to STS indicate readiness for requested transaction (active LOW) ...
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... GO [1] The SAA7131E offers a peripheral interface with General Purpose Input/Output (GPIO) pins. Dedicated functions can be selected: a) Digital video port (VP[7:0]): output only; in 8-bit and 16-bit formats, such as VMI, DMSD (ITU-R BT.601 ); zoom-video, with discrete sync signals; ITU-R BT.656 ; VIP (1.1 and 2.0), with sync encoded in SAV and EAV codes. ...
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... Pins for test purposes Pin Type Description A1 I test mode pin; connect to digital ground J4 AO analog video output for test and debug purposes Table 13. Rev. 03 — 19 May 2008 SAA7131E ; connect pin E8 with pin E9 SSA SSA [3] © NXP B.V. 2008. All rights reserved. SSA ...
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... Functional description 7.1 General description The SAA7131E combines the demodulation functionality of the specific low-IF with audio and video decoding functionality; see Tuner, such as the TDA18271. The SAA7131E is functionally compatible with the SAA7135 audio and video broadcast decoder device and the stand-alone low-IF device TDA8295. ...
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... Filters The low-IF spectrum (1 MHz to 10 MHz) from the Silicon Tuner (TDA18271) is fed symmetrically to the 10-bit IF ADC of the SAA7131E, where it is sampled at 54 MHz. All anti-aliasing filtering is done previously in the Silicon Tuner. The filter forms a baseband complex signal and enables a sampling rate to 13.5 MHz. ...
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... SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder Section 7.2.1) already consists of the demodulated = 108 MHz) through an interpolation stage. The reason is to save the s Rev. 03 — 19 May 2008 SAA7131E 1) © NXP B.V. 2008. All rights reserved ...
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... I C-BUS I S-BUS OR SERIAL INTERFACE OUTPUT PASS-THROUGH (DEFAULT) INTERFACE AUDIO AUDIO 16-BIT 16-BIT DAC DAC PROPAGATE RESET SAA7131E AUDIO FIFOS DMA CONTROL ACPI POWER PCI-BUS INTERFACE MANAGEMENT PCI-bus stereo stereo IF sound input 1 input 2 input SIF ADC AUDIO AUDIO SIF 16-BIT 16-BIT ...
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... DMA channels. The virtual memory address space (from OS) is translated into physical (bus) addresses by the on-chip hardware Memory Management Unit (MMU). The application of the SAA7131E is supported by reference designs and a set of drivers for the Windows operating system (Windows driver model compliant). 7.4 PCI interface 7.4.1 PCI confi ...
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... The device vendor ID is hard coded to 1131h, which is the code for NXP as registered with PCI-SIG. The device ID is hard coded to 7133h. During power-up, initiated by a PCI reset, the SAA7131E fetches additional system information through the I specific codes for the system vendor ID, sub-system ID (board version) and ACPI related parameters into the confi ...
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... D3-hot. D1 First step of reduced power consumption: no functional operation; program registers are not accessible, but content is maintained. Most of the circuitry of the SAA7131E is disabled with the exception of the crystal and real time clock oscillators, so that a quick recovery from possible. D2 Second step of reduced power consumption: no functional operation ...
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... MMU implementation (shown bit width indication is valid for 4 kB mode) 7.4.5 Status and interrupts on PCI-bus The SAA7131E provides a set of status information about internal signal processing, video and audio standard detection, peripheral inputs and outputs (pins GPIO) and behavior on the PCI-bus. This status information can be conditionally enabled to raise an interrupt on the PCI-bus, e ...
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... Playback from video tape cannot be expected to maintain correct timing, especially not during feature mode (fast forward, etc.). Table 18, The SAA7131E decodes all color TV standards and non-standard signals as generated by video tape recorders e.g. automatic video standard detection can be applied, with preference options for certain standards, or the decoder can be forced to a dedicated standard. ...
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... AM FM 2nd FM carrier mono SAP, alternative to alternative to stereo internal FM stereo [ USA, South Japan part of Europe, Korea America Rev. 03 — 19 May 2008 SAA7131E SECAM PAL 4.4 (60 Hz 625 525 4.406 4.250 4.434 282 272 n. n. yes Africa, France, Eastern ...
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... MPEG is defined on this clock and sampling frequency. 7.6.3 Video decoding and automatic standard detection The SAA7131E incorporates color decoding for any analog TV signal. All color TV standards and flavours of NTSC, PAL, SECAM and non-standard signals (VCR) are automatically recognized and decoded into luminance and chrominance components, i.e. ...
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... Macrovision detection The SAA7131E detects if the decoded video signal is copy protected by the Macrovision system. The detection logic distinguishes the three levels of the copy protection as defined in rev. 7.01, and are reported as status information. The Macrovision detection also works for copy protected video signals, which contain inverted bursts but no AGC pulses and no pseudo syncs ...
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... FID = 1) sample rate video region - cropped - scaled scaling video last pixel Rev. 03 — 19 May 2008 SAA7131E VBI DMA 1st buffer (A) 2nd buffer (A) video DMA (A) e.g. interlaced 1st buffer (upper field) 2nd buffer (lower field) mhb997 © NXP B.V. 2008. All rights reserved. ...
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... FID = 1) sample rate scaling 3rd field (odd, FID = 0) sample rate 4th field (even, FID = 1) sample rate scaling Rev. 03 — 19 May 2008 SAA7131E VBI DMA 1st buffer (A) 2nd buffer (A) 3rd buffer (B) 4th buffer (B) video DMA (A) e.g. interlaced 1st buffer (upper field) ...
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... So-called full-field data transmission is also possible, utilizing all video lines for data coding. The SAA7131E supports the capture of VBI data, by the definition of a VBI region, which is captured as raw VBI samples. These samples are sliced and decoded by software on the host CPU. The raw sample stream is taken directly from the ADC and is not processed or fi ...
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... SYNC 1 sync bottom 001aac244 black-level offset (e.g. NTSC M) three channel non-linear transformation Y R YUV RGB matrix V B Rev. 03 — 19 May 2008 SAA7131E 255 blue 100 % 240 blue 75 % 212 colorless 128 -COMPONENT C -COMPONENT R yellow yellow 100 % 16 0 001aac480 output range c ...
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... Feeding the video stream to a local MPEG compression device on the same PCI board, e.g. for a time shift viewing application. The video port of the SAA7131E supports the following 8-bit and 16-bit wide YUV video signalling standards; see • VMI: 8-bit wide data stream, clocked by LLC at 27 MHz, with discrete sync signals HSYNC, VSYNC and VACTIVE • ...
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... NXP Semiconductors 7.7 Sound processing 7.7.1 TV sound stereo decoding The SAA7131E incorporates TV sound decoding from the Second Sound Intermediate Frequency (SSIF) signal. The analog SIF signal is taken from the tuner, digitized and digitally demodulated. If one of the supported TV sound standards is found (BTSC, EIAJ, NICAM mono), the pilot tone is investigated (mono, stereo and dual) and stereo or dual decoded ...
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... The spoken word and other sound should match the displayed picture within a video frame ( SAA7131E uses a special technique to lock the audio sampling clock to the video frame frequency through the Frame-Locked Clock (FLC), so that a programmable but constant number of audio samples is associated with each video frame ...
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... NXP Semiconductors of the inputs of the SAA7131E. By default, after a system reset and without involvement of any driver, this audio signal is passed through to the analog audio output pins that will feed the loopback cable to the sound card line-in connector. The A/V capture driver has to open the default audio pass-through and switch in the TV sound signal. ...
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... I • Peripheral interrupt input: four GPIO pins of the SAA7131E can be enabled to raise an interrupt on the PCI-bus. By this means, peripheral devices can directly intercept with the device driver on changed status or error conditions. ...
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... T ambient temperature amb V electrostatic discharge voltage esd [1] The device has to be programmed according to the register settings described in the User Manual SAA7131E , in order not to exceed 1.55 W. [2] Class 2 according to EIA/JESD22-114-B . Class A according to EIA/JESD22-115-A . [3] 9. Thermal characteristics Table 23. Thermal characteristics Symbol ...
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... All features are enabled. [2] CVBS operation in Silicon Tuner mode with first video decoder analog front end; second video decoder front end is disabled through 2 C-bus; see User Manual SAA7131E . PCI-bus or I [3] CVBS or Y/C operation through external sources e.g. VCR; IF demodulator is set in Standby mode through PCI-bus or I User Manual SAA7131E ...
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... Global standard low-IF and PCI audio and video decoder Conditions all inputs except XTALII all inputs except XTALII source current 4 mA sink current 4 mA see User Manual SAA7131E for PLL settings for 0 dB operational voltage from AGC feedback loop all standards except L/L’ ...
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... L/L’, flat field white else 128 steps Nyquist filter, all standards Nyquist filter, all standards video low-pass filter (M/N, B/G/H, I, D/K and L/L’) M/N B/G/H, I, D/K, L/L’ peak value closed-loop through IF AGC and TDA18271 IF AGC post filter Rev. 03 — 19 May 2008 SAA7131E Min Typ Max Unit - - 5.75 MHz - - 6.75 MHz ...
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... PC = 3.2 dB 19.2 dB 1.1 MHz (related to black/white in RMS, equals CC + 3.6 dB) at 3.3 MHz (related to CC) carrier levels related to PC sync 10.0 dB 19.2 dB 1.1 MHz (related to black/white in RMS, equals CC + 3.6 dB) at 3.3 MHz (related to CC) L/L’ Rev. 03 — 19 May 2008 SAA7131E Min Typ Max Unit 0.8 0.9 1.2 V 0.8 1.0 1.2 V ...
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... L, 1.8 V positive video modulation, standard L, 3.3 V negative video modulation, standard B, 1.8 V negative video modulation, standard B, 3.3 V SAA7131E together with TDA18271 positive video modulation, standard L, 1.8 V positive video modulation, standard L, 3.3 V negative video modulation, standard B, 1.8 V negative video modulation, standard B, 3.3 V 4.8 MHz video modulation ...
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... V (RMS) PC SAA7131E stand-alone FM sound, standard B, 1 sound, standard B, 3 sound, standard L, 1 sound, standard L, 3.3 V SAA7131E together with TDA18271 FM sound, standard B, 1 sound, standard B, 3 sound, standard L, 1 sound, standard L, 3.3 V related to SSIF (SC1 MHz to 200 MHz band Rev. 03 — ...
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... V I [1] f < 5 MHz i amplifier plus anti-alias filter bypassed amplifier plus anti-alias filter bypassed MHz; anti-alias filter i bypassed; AGC = MHz; anti-alias filter i bypassed; AGC = 0 dB Rev. 03 — 19 May 2008 SAA7131E Min Typ Max DDD3 0.3 - +0 24.576 ...
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... ITU-R BS.468 weighted; quasi peak (RMS kHz; i bandwidth = kHz between any analog input pairs kHz i between left and right of each input pair Rev. 03 — 19 May 2008 SAA7131E Min Typ Max - 941 - - 2976 - - 188 - - ...
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... 100 % modulation kHz; compromise i de-emphasis (register SAPDBX = 0b); bandwidth = 0 kHz to 15 kHz; unweighted RMS 100 % modulation kHz; compromise i de-emphasis (register SAPDBX = 0b); bandwidth = 0 kHz to 15 kHz; unweighted RMS Rev. 03 — 19 May 2008 SAA7131E Min Typ Max [ [ 0.5 to +0 ...
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... RMS [6] FM radio stereo with only; 10.7 MHz carrier; 100 % modulation kHz de-emphasis; unweighted RMS 60 % modulation; selective RMS; pre-emphasis off; 100 kHz Rev. 03 — 19 May 2008 SAA7131E Min Typ Max - 0. 0 ...
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... BTSC stereo [9] BTSC SAP [9] EIAJ 3.3 V signal levels at V 3.3 V DDD I/O at high-impedance Rev. 03 — 19 May 2008 SAA7131E Min Typ Max - 0 981 983.0 - 979 985.1 - 921 923.0 - 919 ...
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... 196 mV (RMS); level and gain settings according to DDA i(SIF) diagram in the Application Notes SAA7131E ; unless otherwise specified. [6] Characterizing AM demodulator or measured at BTSC, SAP, EIAJ or FM decoder output, respectively. [7] Effective Input Modulation (EIM) means 75 s de-emphasis applied to audio input signals of the BTSC stereo encoder. ...
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... Global standard low-IF and PCI audio and video decoder CLK 1 val OUTPUT DELAY 3-STATE OUTPUT INPUT 1.5 V input valid clk( Rev. 03 — 19 May 2008 SAA7131E 2.4 V 0 off 2.4 V 1.5 V 0.4 V mgg280 t clk( © NXP B.V. 2008. All rights reserved. 2.4 V 0.4 V 2.4 V 1.5 V 0.4 V mhc002 ...
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... Typical inductance of LC filter For oscillator application, see the Application Notes SAA7131E . [1] 11. Support information 11.1 Related documents This document describes the functionality and characteristics of the SAA7131E. Other documents related to the SAA7131E are as follows: • User Manual SAA7131E , describing the programming aspects • ...
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... NXP Semiconductors 12. Test information 12.1 Boundary scan test The SAA7131E has built-in logic and five dedicated pins to support boundary scan testing which allows board testing without special hardware (nails) according to IEEE 1149.1 of the Joint Test Action Group (JTAG) as chaired by NXP. The 5 special pins are: Test Mode Select (TMS), Test Clock (TCK), Test Reset (TRST_N), Test Data Input (TDI) and Test Data Output (TDO) ...
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... MSB TDII 0000 1000 0010 1001 0000 4-bit 16-bit part number version code Rev. 03 — 19 May 2008 SAA7131E and Figure 16. LSB 000 0001 0101 11-bit manufacturer mandatory identification 001aab219 LSB 12 11 ...
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... 17.2 17 0.25 16.8 16.8 REFERENCES JEDEC JEITA MO-192 - - - Rev. 03 — 19 May 2008 SAA7131E detail 0.1 0.12 0.35 EUROPEAN PROJECTION SOT740-2 ISSUE DATE 05-06-16 05-08-04 © NXP B.V. 2008. All rights reserved. ...
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... Solder bath specifications, including temperature and impurities SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 18. Rev. 03 — 19 May 2008 SAA7131E Figure 18) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © NXP B.V. 2008. All rights reserved. ...
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... Broadcast Television Systems Committee Closed Captioning (in running text) Color Carrier (in Characteristics) Compact Disk Read Only Memory Copy Guard Management System Common Intermediate Format Complementary MOS Rev. 03 — 19 May 2008 SAA7131E peak temperature 001aac844 [1] © NXP B.V. 2008. All rights reserved. time ...
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... Group Delay Equalizer General Purpose Input/Output Horizontal/Vertical Half-Amplitude Duration Inter-IC-Connection Inter-IC Sound Input/Output Integrated Circuit IDentifier International Electrotechnical Commission Institute of Electrical and Electronics Engineers Intermediate Frequency INTerrupt Rev. 03 — 19 May 2008 SAA7131E [2] © NXP B.V. 2008. All rights reserved ...
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... Red-Green-Blue (additive color space) Reduced Instruction Set Computing Root Mean Square Secondary Audio Program Start of Active Video Surface Acoustic Wave Sound Carrier Syndicat des Constructeurs d’Appareils Radiorécepteurs et Téléviseurs Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Video Module Interface Video Programming System Vestigial SideBand modulation Vertical Interval Time Codes Wide Screen Signaling World System Teletext [3] CrystTAL Zoom Video 240 pixel (NTSC) and 352 Rev. 03 — 19 May 2008 SAA7131E 288 pixel (PAL). © NXP B.V. 2008. All rights reserved ...
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... IEEE 1149.1 — IEEE “Standard Test Access Port and Boundary Scan Architecture” according to JTAG, issued in 1990, 1993, 1994 and 2001. SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Table 14 (Section 8 and (Figure 13) (Figure 15 and Figure Section 11 (Section 15 Product data sheet - Product data sheet - Rev. 03 — 19 May 2008 SAA7131E Supersedes SAA7131E_2 1, Figure 3 and Figure 17) Section 6.2 (Section 8 to Section 10) Section 10) (Table 24 to Table 26) 16) to Section ...
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... THAT Corporation royalty payment is paid to NXP Semiconductors, is only permitted to parties who according to information supplied to NXP Semiconductors by THAT Corporation, have a BTSC set-maker license from THAT Corporation, 45 Summer street, Milford, Massachusetts 01757-1656, USA. Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. Silicon Tuner — trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Table 26. Audio and video decoder characteristics . . . . .43 Table 27. Specification of crystal and related applications (examples) Table 28. Boundary scan test naming conventions . . . . .51 Table 29. BST instructions supported by the SAA7131E 51 Table 30. SnPb eutectic process (from J-STD-020C .55 Table 31. Lead-free process (from J-STD-020C .55 Table 32. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .56 Table 33. Revision history . . . . . . . . . . . . . . . . . . . . . . . .61 ...
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... Fig 17. Package outline SOT740-2 (LBGA256 .53 Fig 18. Temperature profiles for large and small components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 SAA7131E_3 Product data sheet Global standard low-IF and PCI audio and video decoder and Rev. 03 — 19 May 2008 SAA7131E © NXP B.V. 2008. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com SAA7131E All rights reserved. Date of release: 19 May 2008 Document identifier: SAA7131E_3 ...