PCF50732 NXP Semiconductors, PCF50732 Datasheet
PCF50732
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PCF50732 Summary of contents
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... DATA SHEET PCF50732 GSM baseband and audio interface Product specification Supersedes data of 1999 May 03 File under Integrated Circuits, IC17 INTEGRATED CIRCUITS 2001 Jan 22 ...
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... Power consumption diagrams 19.6 Typical performance figures 20 GLOSSARY OF ABBREVIATIONS AND TERMS 21 PACKAGE OUTLINE 22 SOLDERING 22.1 Introduction to soldering surface mount packages 22.2 Reflow soldering 22.3 Wave soldering 22.4 Manual soldering 22.5 Suitability of surface mount IC packages for wave and reflow soldering methods 23 DATA SHEET STATUS 24 DEFINITIONS 25 DISCLAIMERS 2 Product specification PCF50732 ...
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... PCF50732H LQFP48 2001 Jan 22 The digital Baseband Serial Interface (BSI), which exchanges baseband data between the PCF50732 and the digital signal processor. The interface also includes signals to power-up and power-down the baseband transmit (TX) and receive (RX) paths. The voice band CODEC is a complete analog front-end circuit ...
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... Note 1. Without load on audio outputs EARP, EARN, AUXSP and BUZ. 2001 Jan 22 CONDITIONS V V DDA DDD 2.7 V; DDD DDA RXON active 2.7 V; note 1 DDD DDA 4 Product specification PCF50732 MIN. TYP. MAX. UNIT 1.0 1.5 2.75 V 2.5 2.7 2. 13.0 MHz 40 +27 ...
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... AUXDAC3 10-BIT 32 AUXDAC2 12-BIT 31 AUXDAC1 8-BIT MICADC OUTPUT EARDAC 45 AMPLIFIER 1 MHz 44 OUTPUT AMPLIFIER 43 OUTPUT AMPLIFIER 35 MGR988 PCF50732 V ref AUXADC1 AUXADC2 AUXADC3 AUXADC4 AUXDAC3 AUXDAC2 AUXDAC1 MICP MICN AUXMICP AUXMICN EARP EARN AUXSP BUZ ...
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... DAC output for AGC; maximum load auxiliary DAC output for AFC; maximum load auxiliary DAC output for power ramping; maximum load 50 pF, 600 A reference voltage supply voltage (analog) 6 Product specification PCF50732 DESCRIPTION = 13 MHz; integrated clk ...
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... Product specification PCF50732 DESCRIPTION ...
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... ADI AFS ACLK RESET MCLK V DDD V SSD CCLK CEN 10 CDI 11 CDO 12 2001 Jan PCF50732 Fig.2 Pin configuration. 8 Product specification PCF50732 V ref SSA(ref) V DDA(ref AUXDAC3 32 AUXDAC2 31 AUXDAC1 30 AUXADC4 29 AUXADC3 28 AUXADC2 27 AUXADC1 V SSA(bb DDA(bb) 25 MGR989 ...
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... Chapter 13 “Voice band Signal Processor (VSP)”. 8.1 General As low power consumption in mobile telephones is a very important issue, all the circuit parts in the PCF50732 can be powered-on/off either by means of the external signals AUXST, TXON or RXON programming the respective register bits in the Control Serial Interface (CSI) ...
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... Decimation of the sampling rate (6 MHz System level filtering. The digital filtering is performed by a digital FIR filter with a group delay for this running average filter of approximately 23 or 11.5 s respectively. The filter uses two’s complement arithmetic. 10 Product specification PCF50732 12-bit values ...
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... BIEN0 must be at least 10 quarterbits long to allow settling of the analog filters. Bits are clocked out of the DSP by the falling edge and clocked into the PCF50732 by the rising edge of BIOCLK. After the BIEN1 period has elapsed, BIEN is set HIGH again and transmission from the DSP ends ...
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... Philips Semiconductors GSM baseband and audio interface 9.3.2.2 Power ramping controller The PCF50732 fully supports all multislot modes which do not require full duplex operation or more than two consecutive transmit bursts. In this specification double burst mode is used for all supported multislot modes while single burst mode supports the normal GSM modes ...
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... RU Bits are clocked out of the PCF50732 by the falling edge, and clocked into the DSP by the rising edge of BIOCLK. In normal bursts 148 I/Q pairs are read from the PCF50732. When RXON goes LOW, the last pair of I and Q values will be sampled and transferred to the baseband processor (both I and Q components) ...
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... QB ramp- data data data logic 1s d.c. d.c. B(0) B( PCF5087X PCF50732 PIN I/O PIN I RFSIG[z] BDIO I/O SIOXD O SIXEN_N O SIOXCLK ramp-down trail BIOCLK clocks data logic B( Product specification PCF50732 PCF5087X I high-Z high-Z MGR990 ...
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... BIEN falling edge 45 2001 Jan I11 I0 Q11 t 14 548 s PARAMETER 15 Product specification PCF50732 16t MGR991 MIN. TYP. MAX. 76 ...
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... EARDAC is a DAC operating at a sampling frequency of 1 MHz. It converts the bitstream input to a sampled differential analog signal and low-pass filter for the output signal at the same time. 16 Product specification PCF50732 MIN. TYP. MAX. 52 120 26 60 ...
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... Hz and a sidetone engine. Various volume settings are calculated inside this block. Figure 7 shows the block diagram of the voice band signal processor. 17 Product specification PCF50732 1 V/0 bar kHz). MICADC analog-to-digital converter which DECIMATOR TXFILTER ...
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... The ASI is the voice band serial interface which provides the connection for the exchange of PCM data in both receive and transmit directions, between the baseband digital signal processor and the PCF50732. The data is coded in 16-bit linear PCM two’s complement words. A frame start is defined by the first falling edge of ACLK after a rising AFS ...
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... ADI t rpdc ADO t : receive path data channel delay. rpdc t : transmit path data channel delay. tpdc Fig.8 Frame structure of the Audio Serial Interface (ASI). 2001 Jan 22 I word word t tpdc 19 Product specification PCF50732 PCF5087X PIN I DCL O FSC O MGR993 ...
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... MSB first slot slot 1 first bit bit 2 Fig.9 Timing of the Audio Serial Interface (ASI). PARAMETER 20 Product specification PCF50732 LSB last slot last bit LSB last slot last bit LSB last slot last bit LSB ...
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... The status of AUXDAC1 is controlled by the signal AUXST and a power-up bit in the Power control register. The signal that switches the external VCXO can also be used to control the AUXST pin of the PCF50732. The AUXDAC1 output is pulled-down in Power-down mode (AUXST = LOW). The input MCLK is then deactivated. ...
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... RXON returns LOW, indicating no receive burst activity. When register AUXADC1A is read, a battery voltage measurement during a transmission burst is executed. The PCF50732 waits for a rising edge of TXON, and powers up the receive path. handbook, full pagewidth 1480 output code ...
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... CONTROL SERIAL INTERFACE (CSI) The Control Serial Interface block is used to set and read the status bits inside the PCF50732 also used to read data from the AUXADCs and to write data into the auxiliary DACs. Finally, the block is used to write the power ramping curve into a 64 10-bit static RAM ...
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... CEN hold time 27 t CDO 3-state after CEN HIGH 37 t CEN HIGH time 38 2001 Jan dummy MSB(#19 MSB(#19) PARAMETER 24 Product specification PCF50732 ADD0(# high-Z ADD0(# MIN. MAX 100 MGR997 ...
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... Philips Semiconductors GSM baseband and audio interface 12.3 Control register block This section describes the different registers that are implemented in the PCF50732. An overview is given in Table 11. Tables describe all the registers of the PCF50732. Table 11 Control register block overview ADDRESS ACCESS 0000 W 0001 ...
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... (2) ( Product specification PCF50732 VALUE DESCRIPTION VALUE b11 b10 ...
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... MCLK) between the rising edge of TXON and the start of the ramp- (s1) (s0 9-bit signed offset compensation value Product specification PCF50732 VALUE auxoff flag 4 flag 3 flag 2 flag 1B fl Aux ...
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... It can also be measured by the device itself. A write to the offset trigger register will trigger an offset measurement. An offset measurement is a special case of an AUXADC measurement and takes approximately 160 s. The trigger register is write only b11 b10 b9 DESCRIPTION 28 Product specification PCF50732 DESCRIPTION VALUE ...
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... X AUXAMP off (default AUXAMP BUZAMP off (default BUZAMP on 0 single-ended 1 differential (default) 0 active LOW 1 active HIGH (default 4-bit delay value (default = single clock (default) 1 double clock (default) PCF50732 ...
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... RXPGA and TXPGA settings log ----- - = 32 30 SELECTED RANGE + dir hf bgb 0 vbch fdg1 fdg0 DESCRIPTION Product specification PCF50732 DEFAULT SETTING mute “10000” “00101” ...
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... RXVOL/SidePGA 011001 5.88 011000 5.74 010111 5.60 010110 5.46 010101 5.31 010100 5.17 010011 5.01 010010 4.86 010001 4.70 010000 4.54 001111 4.38 001110 4.22 001101 4.05 001100 3.88 001011 3.70 001010 3.52 001001 3.34 001000 3.15 000111 2.96 000110 2.77 000101 2.57 000100 2.36 000011 2.15 31 Product specification PCF50732 GAIN (dB) RXPGA/TXPGA RXVOL/SidePGA 7.94 1.94 7.72 1.72 7.49 1.49 7.26 1.26 7.02 1.02 6.78 0.78 6.53 0.53 6.27 0.27 6.00 0.00 5.72 0.28 5.44 0.56 5.14 0.86 4.84 1.16 4.52 1.48 4.20 1.80 3.86 2.14 3.50 2.50 3.13 2.87 2.75 3.25 2.34 3.66 1.92 4.08 1.47 4.53 1.00 5.00 0.51 5.49 0.00 6.02 0.58 6.58 1.18 7.18 1.82 7 ...
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... Reading back from the IRAM is not straightforward due to the need for an extra clock pulse when accessing RAMs; when reading back the contents of RAM locations and 4 actual output is ‘undefined’ etc. 32 Product specification PCF50732 power-down power-up. VALUE DEFAULT 5 ...
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... VSP firmware has been downloaded and before the VSP is activated. VALUE don’t care don’t care Product specification PCF50732 VALUE ...
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... MCLK input reflected on BDIO TM12 baseband bitstream output TM13 baseband transmit state machine output TM14 3-state all digital outputs TM15 2001 Jan 22 VALUE don’t care 34 Product specification PCF50732 ...
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... VOICE BAND SIGNAL PROCESSOR (VSP) 13.1 Hardware description The VSP used in the PCF50732 is a 30-bit fixed point VSP with separate data and instruction areas. The data path consists of two guard bits, 16 data bits before and 12 data bits behind the binary point for a total of 30 bits. Two’s complement notation is used inside the data path ...
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... Fig.12 Voice band Signal Processor (VSP) block diagram. 2001 Jan 22 INPUT PORTS (from ADI) (from FIR) CTE CSI in (9.0) or (0.12) (16.0) (16.0) (12.0) (1) INPUT SELECTOR (6.0) (18.12) FLAGS (2.0) AFS INDEX ACCUMULATOR OUTPUT REGISTER (16.0) RX out (to NOISE SHAPER) OUTPUT PORTS 36 Product specification TXPGA RXPGA RXVOL SidePGA (2.4) (2.4) (1.5) (1.5) ALU (18.12) (18.12) (16.0) (12.0) TX out CSI out (to ADO) MGU300 PCF50732 ...
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... Product specification PCF50732 ...
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... FIR filter NAME DIRECTION read/write read/write read/write read read read read read 38 Product specification PCF50732 ASSEMBLER RANGE SHORT HAND register ports 256 to +255; note 63; note 1 OPERAND REMARKS RANGE 32768 to +32767 (16 bits) 32768 to +32767 (16 bits) 2048 to +2047 (12 bits) fi ...
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... R(r.a.) register address R(r. small integer s. OPERATION register address A register address A 39 Product specification PCF50732 ASSEMBLER A LDA c <coeff> load coefficient A LDA r <r.a.> load register A LDA i <r.a.> load register indexed A LDA p <p.n.> load port A LDA s <s.i.> load integer A LDA x load index ASSEMBLER R(r.a.) STO r < ...
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... OPERATION coefficient A register address A register address A small integer Product specification PCF50732 ASSEMBLER A ADD c <coeff> add coefficient A ADD r <r.a.> A ADD i <r.a.> A ADD p <p.n.> A ADD s <s.i.> A ADD x ASSEMBLER coeff A SUB c <coeff> subtract R(r.a.) A SUB r <r.a.> R(r. SUB i < ...
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... Product specification PCF50732 0 OPERATION ASSEMBLER <addr> PC JMFS <f.l.> <addr> 0 OPERATION ASSEMBLER <addr> PC JMFC <f.l.> <addr> 0 OPERATION ASSEMBLER <o.a> stack JSFS <f.l.> <addr> <addr> OPERATION ASSEMBLER <o.a> stack JSFC <f.l.> <addr> <addr> ...
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... Reads in another source code file and then continues with the current file. Defines a comment; the rest of the line is skipped. For debugging. Breakpoint for debugging OPERATION X value <value> <f.l.> 0 OPERATION <value> I IDX = <value> <value> I IDX + <value> IDX A DEFINITION Product specification PCF50732 ASSEMBLER STF <f.l.> <value> ASSEMBLER ...
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... Product specification MIN. MAX. 0.5 +3 +10 100 +100 0 800 40 +85 65 +150 CONDITIONS VALUE 80 V DDA DDD MIN. TYP 1.0 1.5 0.0 0.7V DDD 1 0.7V DDD 0.7V DDD PCF50732 UNIT 0 UNIT K/W ; MAX. UNIT A mW 2.75 V 0.3V V DDD V V DDD A 0.2V V DDD V 0.2V V DDD V ...
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... V and V DDA(bb) DDA(vb) DDA(vbo 1.5 V; DDD V = 2.7 V; DDA RXON active no external load 44 Product specification MIN. TYP. 0 0.7V DDD 1 0.7V DDD 1 DDA(ref) 2.5 2.7 3.5 1.25 0.1 1.175 1.25 0.5V ref 0.5V ref V ref V ref V ref PCF50732 MAX. UNIT 0.3V V DDD V V DDD A 0.2V V DDD 1.325 ...
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... LSB, for 0 < 100 kHz differential differential kHz kHz kHz or above Product specification PCF50732 MIN. TYP. MAX. UNIT 13.0 MHz 5 5 ...
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... Product specification PCF50732 TYP. MAX. UNIT 10 bit 55 dB 270.833 kHz 1.0 1.1 V 1.25 1. ...
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... (p-p) IDM(RXIQ) for maximum input amplitude applying a 217 Hz sine wave of 100 mV (p-p) on top of the analog supply voltage referenced to maximum amplitude at maximum input amplitude at maximum input amplitude; 10 kHz < f < 100 kHz 47 Product specification PCF50732 MIN. TYP. MAX. UNIT 12 66 1.0 1.25 1.5 SS 1.5 +1.5 6 ...
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... GSM baseband and audio interface SYMBOL PARAMETER POST power-on settling RXIQ time FGD filter group delay RXIQ 2001 Jan 22 CONDITIONS including decimator; ZIF mode including decimator; NZIF mode ZIF mode NZIF mode 48 Product specification PCF50732 MIN. TYP. MAX. UNIT 111 s 120 QB 55 11.5 s ...
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... ADO = 20 dBm0 ADO = 30 dBm0 ADO = 40 dBm0 ADO = 45 dBm0 applying a 437 Hz sine wave of 100 mV (p-p) on top of the analog supply voltage equal for ADI and ADO fixed to 8 kHz at pin AFS 49 Product specification PCF50732 MIN. TYP. MAX. UNIT 13 bit 1000 kHz 24 0 +12 ...
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... Table 100 300 to 3300 3300 to 3400 4000 4600 28.6 kHz load: 16 differential load: 8 single-ended load: 8 single-ended load 1000 Hz differential single-ended DD A-weighted 50 Product specification PCF50732 MIN. TYP. MAX. 13 1000 + 1.0 +1.0 2.0 +1 ...
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... F in series to ground supply load: 16 with series to ground supply load: 8 with 100 F in series to ground supply load: 16 with series to ground supply load: 16 with series to ground supply 51 Product specification PCF50732 MIN. TYP. MAX ref 2 1.5 62 ...
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... V ; see Fig.13b SS see Section 18.1 register value: 000H register value: 3FFH (1) (2) load see Fig.13c = [V (i) ( LSB)/1 LSB]; DNL > equivalent to monotonicity V (i) (min) 52 Product specification PCF50732 MIN. TYP. MAX 0.15 2.1 2.2 2.3 1.147 8 5.0 +5.0 1.0 +1 ...
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... AUXADC POST power-on settling time AUXADC POST settling time for offset ADCOFF compensation 2001 Jan 22 CONDITIONS MIN. coded in 12 bits 0.0 20 after offset compensation 0 Product specification PCF50732 TYP. MAX. UNIT 1480 LSB 2.0 V +20 mV 2.0 V 1.0 M 2 LSB +3 ...
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... V SS MGS172 e. AUXSP or BUZ 2001 Jan 22 handbook, halfpage 2 k MBL023 handbook, halfpage 1 k MBH602 handbook, halfpage 100 F Fig.13 Typical output loads. 54 Product specification PCF50732 AUXDAC2 SSA MBL024 b. AUXDAC2. EARP or AUXSP 800 H 100 pF 16 EARN MBL020 d. EARP or AUXSP and EARN. ...
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... MCLK MICN 6 41 EARP 46 RESET EARN ref AUXSP BUZ Fig.14 Application diagram. 55 Product specification PCF50732 BUS CLOCK 17 DATA UAA3535 MHz ON VCXO PA-CONTROL CIRCUITRY CHARGER BATTERY VOLTAGE BATTERY TEMPERATURE AMBIENT TEMPERATURE ...
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... A (typical). Since generator is supplied by V All digital signals MUST remain stable for t AUXST has gone HIGH. This is necessary to avoid any timing violations in the digital part of the PCF50732 caused by an unstable MCLK clock input The previously mentioned 2.5 ms for t for C (68 nF) is highly recommended for good noise and power supply rejection figures ...
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... An assembler/emulator for the VSP has been written in order to facilitate the development of new firmware strongly suggested to study the existing firmware since it contributes heavily to the performance of the device. 57 Product specification PCF50732 MICP 100 nF MICN 100 nF MGS171 b. Microphone input test set-up. ...
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... DACs inputs. The diagrams were measured with the default values for DAC1 and DAC2 and with code 511 on DAC3. External interfaces are not included. For a signal at the differential earpiece output of amplitude A across a load resistance average current I must be added --- - 4 R 2001 Jan 22 58 Product specification PCF50732 ...
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... MGT268 handbook, halfpage I DDD (1) (2) (3) 2.7 2.8 V DDA (V) (1) T ( Fig.19 I DDA 59 Product specification MGT267 60 80 100 150 ( A) 100 1 amb(max amb(typ amb(typ) in standby mode as a function of V DDD PCF50732 MGT269 (1) (2) (3) 2 DDD (V) . DDD ...
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... V DDA (V) (1) T ( Fig.21 I DDA MGT272 handbook, halfpage I DDD (mA) (1) (2) (3) 2.7 2.8 V DDA (V) (1) T (2) T (3) T Fig. Product specification PCF50732 10 8 (1) 6 (2) ( 1 amb(max amb(typ amb(typ) in paging mode as a function of V DDD ...
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... Fig.25 I MGT276 handbook, halfpage gain (dB) (2) (3) (1) (3) 1 (V) (1) Differential input voltage 300 mV (p-p). (2) Differential input voltage 3 V (p-p). Fig.27 Baseband receive frequency response 61 Product specification PCF50732 1 amb(max amb(typ amb(typ) during full operation as a function of ...
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... Hz. (2) 1000 Hz. Fig.31 Voice band receive section SINAD (nominal 62 10 output (dBm) (1) 20 (2) (3) ( 1000 2000 characteristic. 80 SINAD (dBp output). Product specification PCF50732 MLD384 3000 4000 f (Hz) MLD386 (1) ( input (dBFS) ...
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... Hz. (2) 1000 Hz. Fig.35 Voice band transmit section SINAD 63 0 output 2 ( characteristic (pass band detail). 90 (dB (low gain mode). Product specification PCF50732 MLD388 (kHz) MLD390 (1) ( input (dBm) ...
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... The S out( max ------------------------ in N out(meas) 13 MHz applied at the input of the DUT and out(meas) S/N = ------------------------ N out(meas) 64 Product specification (note 1) is measured at the out(meas) b)]/1LSB; out(meas PCF50732 and N out(meas) ...
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... Philips Semiconductors GSM baseband and audio interface VSP Voice band signal processor, as implemented on the PCF50732. V Reference (ground supply) potential. SS ZIF A mode into which the BBRX is switched to process data at an intermediate frequency of zero. Note 1. If the output signal is a bitstream signal from a sigma-delta ADC, then the N bandwidth (e ...
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... 2.5 scale (1) ( 0.27 0.18 7.1 7.1 9.15 0.5 0.17 0.12 6.9 6.9 8.85 REFERENCES JEDEC EIAJ MS-026 detail 9.15 0.75 1.0 0.2 0.12 0.1 8.85 0.45 EUROPEAN PROJECTION Product specification PCF50732 SOT313 (1) ( 0.95 0. 0.55 0.55 0 ISSUE DATE 99-12-27 00-01-19 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 67 Product specification PCF50732 ...
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... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2001 Jan 22 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 68 Product specification PCF50732 (1) REFLOW suitable suitable suitable suitable suitable ...
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... Product specification PCF50732 (1) These products are not Philips Semiconductors ...
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... Philips Semiconductors GSM baseband and audio interface 2001 Jan 22 NOTES 70 Product specification PCF50732 ...
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... Philips Semiconductors GSM baseband and audio interface 2001 Jan 22 NOTES 71 Product specification PCF50732 ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...