CY7C131-25NI Cypress Semiconductor Corporation., CY7C131-25NI Datasheet
CY7C131-25NI
Available stocks
Related parts for CY7C131-25NI
CY7C131-25NI Summary of contents
Page 1
... R/W L [2] INT L Note: 1. CY7C130/CY7C131 (Master): BUSY is open drain output and requires pull-up resistor CY7C140/CY7C141 (Slave): BUSY is input. 2. Open drain outputs: pull-up resistor required. Cypress Semiconductor Corporation Document #: 38-06002 Rev Dual-Port Static RAM Functional Description The CY7C130/CY7C131/CY7C140 high-speed CMOS dual-port static RAMs. Two ports are provided permitting independent access to any location in memory ...
Page 2
... Busy Flag Power Ground 7C130-30 7C130-35 7C131-30 7C131-35 [3] [3] 7C131-25 7C140-30 7C140-35 7C141-25 7C141-30 7C141- 170 170 120 170 CY7C130/CY7C131 CY7C140/CY7C141 PQFP Top View 7C131 A 33 ...
Page 3
... Mil > Com’l 135 R IH Mil [10] and Com’ Mil – 0.2V CC < 0.2V and using AC Test Waveforms input levels of GND to 3V. RC CY7C130/CY7C131 CY7C140/CY7C141 Ambient Temperature V CC ° ° + ± 10% ° ° – + ± 10% ° ...
Page 4
... CY7C130/CY7C131 CY7C140/CY7C141 [3] 7C130-35,45 7C130-55 7C131-35,45 7C131-55 7C140-35,45 7C140-55 7C141-35,45 7C141-55 Max. Min. Max. Min. Max. Unit 105 105 85 Max. Unit 281Ω BUSY OR INT 30 pF BUSY Output Load (CY7C130/CY7C131 ONLY) 90% 10% ≤5ns Page [+] Feedback ...
Page 5
... HZCE LZCE HZOE = 5pF as in part ( Test Loads. Transition is measured ±500 mV from steady state voltage. L CY7C130/CY7C131 CY7C140/CY7C141 [3] 7C130-25 7C130-30 7C131-25 7C131-30 7C140-25 7C140-30 7C141-25 7C141-30 Min. Max. Min. Max. Unit 25 30 ...
Page 6
... Note 18 Note [16] 15 [16] 15 [16] 15 [6,11] 7C130-35 7C131-35 7C140-35 7C141-35 Min. Max CY7C130/CY7C131 CY7C140/CY7C141 [3] 7C130-25 7C130-30 7C131-25 7C131-30 7C140-25 7C140-30 7C141-25 7C141-30 Min. Max. Min. Max. Unit ...
Page 7
... Note 18 Note [16] 25 [16] 25 [16] 25 CY7C130/CY7C131 CY7C140/CY7C141 7C130-45 7C130-55 7C131-45 7C131-55 7C140-45 7C140-55 7C141-45 7C141-55 Min. Max. Min. Max. Unit ...
Page 8
... Read Cycle No LZOE t LZCE DATA OUT [20] Read Cycle No. 3 Read with BUSY, Master: CY7C130 and CY7C131 ADDRESS R R INR ADDRESS BUSY L DOUT L Notes: 19. R/W is HIGH for read cycle. 20. Device is continuously selected and ...
Page 9
... Either Port SCE PWE t SD DATA VALID HIGH IMPEDANCE [16, 23 SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE PWE HZWE . SD CY7C130/CY7C131 CY7C140/CY7C141 LZWE to allow the data I/O pins to enter high impedance SD Page [+] Feedback ...
Page 10
... Right Address Valid First ADDRESS MATCH ADDRESS ADDRESS L BUSY L Document #: 38-06002 Rev. *D ADDRESS MATCH BLC BHC ADDRESS MATCH BLC BHC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C130/CY7C131 CY7C140/CY7C141 Page [+] Feedback ...
Page 11
... Switching Waveforms (continued) Busy Timing Diagram No. 3 Write with BUSY (Slave:CY7C140/CY7C141 BUSY Document #: 38-06002 Rev. *D CY7C130/CY7C131 CY7C140/CY7C141 t PWE t WH Page [+] Feedback ...
Page 12
... Left Side Clears INT L ADDR R INT L Document #: 38-06002 Rev WRITE 3FF EINS t WINS INT t EINR t OINR EINS t WINS EINR CY7C130/CY7C131 CY7C140/CY7C141 t RC READ 3FF t RC READ 3FE INR t OINR Page [+] Feedback ...
Page 13
... AMBIENT TEMPERATURE (°C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15.0 10 4. 25° 200 400 600 800 1000 CAPACITANCE (pF) CY7C130/CY7C131 CY7C140/CY7C141 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 5. 25° 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 ...
Page 14
... CY7C130-35PC CY7C130-35PI CY7C130-35DMB 45 CY7C130-45PC CY7C130-45PI CY7C130-45DMB 55 CY7C130-55PC CY7C130-55PI CY7C130-55DMB 15 CY7C131-15JC CY7C131-15JXC CY7C131-15NC CY7C131-15JI CY7C131-15JXI 25 CY7C131-25JC CY7C131-25JXC CY7C131-25NC CY7C131-25NXC CY7C131-25JI CY7C131-25NI 30 CY7C131-30JC CY7C131-30NC CY7C131-30JI 35 CY7C131-35JC CY7C131-35NC CY7C131-35JI CY7C131-35NI 45 CY7C131-45JC CY7C131-45NC CY7C131-45JI CY7C131-45NI 55 CY7C131-55JC CY7C131-55JXC CY7C131-55NC CY7C131-55NXC CY7C131-55JI CY7C131-55JXI CY7C131-55NI Document #: 38-06002 Rev. *D ...
Page 15
... Plastic Leaded Chip Carrier N52 52-Pin Plastic Quad Flatpack J69 52-Lead Plastic Leaded Chip Carrier N52 52-Pin Plastic Quad Flatpack J69 52-Lead Plastic Leaded Chip Carrier N52 52-Pin Plastic Quad Flatpack CY7C130/CY7C131 CY7C140/CY7C141 Operating Range Commercial Industrial Commercial Industrial Military Commercial Industrial ...
Page 16
... EINR t INR BUSY TIMING [24 BDD Note: 24. CY7C140/CY7C141 only. CY7C130/CY7C131 CY7C140/CY7C141 Subgroups 10, 11 ...
Page 17
... Document #: 38-06002 Rev. *D 48-Lead (600-Mil) Sidebraze DIP D26 MIL-STD-1835 D-14 Config. C 52-Lead Plastic Leaded Chip Carrier J69 SEATING PLANE 47 46 0.045 0.055 34 0.023 0.033 33 CY7C130/CY7C131 CY7C140/CY7C141 51-80044 ** MIN. DIMENSIONS IN INCHES MAX. 0.013 0.021 0.690 0.730 0.020 MIN. 0.090 51-85004-*A 0.130 0.165 ...
Page 18
... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 48-Lead (600-Mil) Molded DIP P25 52-Lead Plastic Quad Flatpack N52 CY7C130/CY7C131 CY7C140/CY7C141 51-85020-*A 51-85042-** ...
Page 19
... Document History Page Document Title: CY7C130/CY7C131/CY7C140/CY7C141 Dual-Port Static RAM Document Number: 38-06002 Issue Orig. of REV. ECN NO. Date Change ** 110169 09/29/01 *A 122255 12/26/02 *B 236751 See ECN *C 325936 See ECN *D 393153 See ECN Document #: 38-06002 Rev. *D Description of Change SZV Change from Spec number: 38-00027 to 38-06002 ...