CY24204ZC-4 Cypress Semiconductor Corporation., CY24204ZC-4 Datasheet

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CY24204ZC-4

Manufacturer Part Number
CY24204ZC-4
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY24204ZC-4
Manufacturer:
CY
Quantity:
66
Cypress Semiconductor Corporation
Document #: 38-07450 Rev. *C
Features
Block Diagram
• Integrated phase-locked loop (PLL)
• Low jitter, high-accuracy outputs
• VCXO with Analog Adjust
• 3.3V operation
Part Number
XOUT
VCXO
CY24204-3
CY24204-4
CY24204-5
XIN
FS1
FS0
OE
OSC.
Outputs
4
4
4
Q
27-MHz Crystal Input
27-MHz Crystal Input
27-MHz Crystal Input
Φ
VDDL
P
Input Frequency
VCO
PLL
VDD
AVDD
3901 North First Street
AVSS
MULTIPLEXER
VSS
DIVIDERS
OUTPUT
AND
VSSL
Two copies of 27-MHz reference clock output, two copies of
27/27.027/74.250/74.17582418 MHz (frequency selectable)
Two copies of 27-MHz reference clock output, two copies of
27/27.027/74.250/74.17582418 MHz (frequency selectable,
Increased VCXO pull range)
Two copies of 27-MHz reference clock output, two copies of
27/27.027/74.250/74.17582418 MHz (frequency selectable,
Increased output drive strength)
Benefits
• Internal PLL with up to 400-MHz internal operation
• Meets critical timing requirements in complex system
• Large ±150-ppm range, better linearity
• Enables application compatibility
designs
DTV, STB Clock Generator
CLK1
CLK2
REFCLK1
REFCLK2
(-3,-4,-5)
San Jose
Output Frequency Range
,
CA 95134
REFCLK1
REFCLK2
Pin Configurations
Revised January 19, 2005
AVDD
VCXO
MediaClock™
AVSS
VSSL
VDD
XIN
16-pin TSSOP
1
2
3
4
5
6
7
8
408-943-2600
CY24204
16
15
14
13
12
11
10
9
CLK1
FS0
CLK2
OE
FS1
VSS
VDDL
XOUT
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CY24204ZC-4 Summary of contents

Page 1

Features • Integrated phase-locked loop (PLL) • Low jitter, high-accuracy outputs • VCXO with Analog Adjust • 3.3V operation Part Number Outputs Input Frequency CY24204-3 4 27-MHz Crystal Input CY24204-4 4 27-MHz Crystal Input CY24204-5 4 27-MHz Crystal Input Block ...

Page 2

Frequency Select Options OE FS1 FS0 Pin Description Name Pin Number XIN ...

Page 3

Absolute Maximum Conditions (Above which the useful life may be impaired. For user guide- lines, not tested.) Supply Voltage ( )..................–0.5 to +7.0V DD DDL DDL DC Input Voltage...................................... –0. Pullable Crystal Specifications Parameter ...

Page 4

AC Electrical Specifications [2] Parameter Name DC Output Duty Cycle ER Rising Edge Rate for -3,-4 Output Clock Edge Rate, Measured from 20 Falling Edge Rate for 1 -3,-4 ER Rising Edge Rate for - ...

Page 5

... Ordering Information Ordering Code Package Name Standard CY24204ZC-3 Z16 CY24204ZC-3T Z16 CY24204ZC-4 Z16 CY24204ZC-4T Z16 CY24204ZC-5 Z16 CY24204ZC-5T Z16 Lead-free CY24204ZXC-3 Z16 CY24204ZXC-3T Z16 CY24204ZXC-4 Z16 CY24204ZXC-4T Z16 CY24204ZXC-5 Z16 CY24204ZXC-5T Z16 Package Drawing and Dimensions 1 4.30[0.169] 4.50[0.177] 16 0.65[0.025] BSC. 0.19[0.007] ...

Page 6

Document History Page Document Title: CY24204 MediaClock™ DTV, STB Clock Generator Document Number: 38-07450 REV. ECN NO. Issue Date ** 123842 04/10/03 *A 128775 09/0803 *B 214080 See ECN *C 310573 See ECN Document #: 38-07450 Rev. *C Orig. of ...

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