CY2220PVC-2 Cypress Semiconductor Corporation., CY2220PVC-2 Datasheet

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CY2220PVC-2

Manufacturer Part Number
CY2220PVC-2
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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CY2220PVC-2
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Cypress Semiconductor Corporation
Document #: 38-07206 Rev. *A
XTALOUT
Logic Block Diagram
Intel and Pentium are registered trademarks of Intel Corporation.
Direct Rambus is a trademark of Rambus, Inc.
• Compliant to Intel
• Multiple output clocks at different frequencies
• Spread Spectrum clocking
• Power-down features
• Three Select inputs
• Low-skew and low-jitter outputs
• OE and Test Mode support
• 56-pin SSOP package
XTALIN
SEL133
Specifications
— Four pairs of differential CPU outputs, up to 133 MHz
— Ten synchronous PCI clocks
— Two Memory Reference clocks, 180 degrees out of
— Four AGP and Hub Link clocks at 66 MHz
— Two 48-MHz clocks
— Two reference clocks at 14.318 MHz
— 31 kHz modulation frequency
— Default is –0.6%, which is recommended by Intel
SELA
SELB
PWR_DWN
SPREAD
phase
MultSel0
MultSel1
14.318
OSC.
MHz
133-MHz Spread Spectrum Clock Synthesizer/Driver
®
CK00 Clock Synthesizer/Driver
Features
EPROM
SYS
CPU
PLL
PLL
Stop Logic
3901 North First Street
Divider
and
Supports next generation Pentium
tial clock drivers
Motherboard clock generator
Enables reduction of EMI and overall system cost
Enables ACPI compliant designs
Supports up to eight CPU clock frequencies
Meets tight system timing requirements at high frequency
Enables ATE and “bed of nails” testing
Widely available, standard package enables lower cost
CPUCLKB [0–3]
3V66 [0–3] (66.67 MHz)
REFCLK [0–1]
CPUCLK [0–3]
MemRef, MemRefB
PCICLK [0–9] (33.33 MHz)
USBCLK [0-1] (48 MHz)
— Support Multiple CPUs and a chipset
— Support for PCI slots and chipset
— Drives up to two Direct Rambus
— Supports USB host controller and SuperI/O chip
— Supports ISA slots and I/O chip
with Differential CPU Outputs
(DRCG)
San Jose
Pin Configuration
REFCLK0/MultSel_0
REFCLK1/MultSel_1
USBCLK0/SelA
USBCLK1/SelB
Benefits
PWR_DWN
PCICLK_6
PCICLK_0
PCICLK_1
PCICLK_2
PCICLK_3
PCICLK_4
PCICLK_5
PCICLK_7
PCICLK_8
PCICLK_9
XTALOUT
CA 95134
XTALIN
V
V
V
V
V
V
V
V
V
V
Sel133
DDREF
DDUSB
SSREF
DDPCI
SSUSB
DDPCI
DDPCI
SSPCI
SSPCI
SSPCI
Revised December 30, 2002
®
processors using differen-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Clock Generators
Top View
SSOP
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
408-943-2600
CY2220
V
MemRef
MemRefB
V
SPREAD
CPUCLK_3
CPUCLK_3B
V
CPUCLK_2
CPUCLK_2B
V
CPUCLK_1
CPUCLK_1B
V
CPUCLK_0
CPUCLK_0B
V
I
AV
AV
V
3V66_3
3V66_2
V
V
3V66_1
3V66_0
V
REF
DDMEM
SSMEM
DDCPU
SSCPU
DDCPU
SSCPU
DD3V66
SS3V66
SS3V66
DD3V66
DD
SS

Related parts for CY2220PVC-2

CY2220PVC-2 Summary of contents

Page 1

Spread Spectrum Clock Synthesizer/Driver Features • Compliant to Intel ® CK00 Clock Synthesizer/Driver Specifications • Multiple output clocks at different frequencies — Four pairs of differential CPU outputs 133 MHz — Ten synchronous PCI clocks — ...

Page 2

Pin Summary Name Pins V 1 SSREF V 4 DDREF V 7, 13, 19 SSPCI V 10, 16, 22 DDPCI V 32, 33 SS3V66 V 29, 36 DD3V66 V 24 SSUSB V 27 DDUSB V 40, 46 SSCPU V 43, ...

Page 3

Function Table SEL133 SELA SELB Actual Clock Frequency Values Target Clock Frequency Output (MHz) CPUCLK ...

Page 4

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Supply Voltage....................................................–0.5 to +7.0V Input Voltage...............................................–0. Operating Conditions Over which Electrical Parameters are Guaranteed Parameter 3.3V ...

Page 5

Switching Characteristics Parameter Output t All Output Duty Cycle 1 t CPU Rise Time 2 t USB, REF Rising Edge Rate 2 t PCI, 3V66, Rising Edge Rate 2 MemRef t CPU Fall Time 3 t USB, REF ...

Page 6

Switching Waveforms Duty Cycle Timing (Single Ended Output) Duty Cycle Timing (CPU Differential Output) All Outputs Rise/Fall Time OUTPUT CPU-CPU Clock Skew Host_b Host Host_b Host 3V66-3V66 Clock Skew 3V66 3V66 Document #: 38-07206 Rev ...

Page 7

Switching Waveforms (continued) PCI-PCI Clock Skew PCI PCI 3V66-PCI Clock Skew 3V66 PCI CPU Clock Cycle-Cycle Jitter Host_b Host Cycle-Cycle Clock Jitter CLK [8] PWR_DOWN CPUCLK (Internal) PCICLK (Internal) PWR_DWN CPUCLK (External) PCICLK (External) VCO Crystal Note: 8. Shaded section ...

Page 8

... DDCPU V DDMRef Test Node Test Node 30 pF Ordering Information Ordering Code CY2220PVC-1 CY2220PVC-2 Notes: 9. Each supply pin must have an individual decoupling capacitor. Document #: 38-07206 Rev 13, 19, 24, 32, 33, 37, 40, 46 10, 16, 22, 27, 29, 36, 38, 43, 49, 56 CY2220 Ref, USB Outputs 20 pF ...

Page 9

Layout Example +3.3V Supply Document #: 38-07206 Rev VDDQ3 10 F 0.005 ...

Page 10

Package Diagram Document #: 38-07206 Rev. *A © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a ...

Page 11

Document Title: CY2220 133-MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs Document Number: 38-07206 Issue REV. ECN NO. Date ** 111730 01/17/02 *A 121841 12/30/02 Document #: 38-07206 Rev. *A Orig. of Change DSG Change from Spec number: 38-00813 ...

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