SAA7715AH NXP Semiconductors, SAA7715AH Datasheet
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SAA7715AH
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SAA7715AH Summary of contents
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... DATA SHEET SAA7715AH Digital Signal Processor Preliminary specification INTEGRATED CIRCUITS 2003 Mar 13 ...
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... SOLDERING 18.1 Introduction to soldering surface mount packages 18.2 Reflow soldering 18.3 Wave soldering 18.4 Manual soldering 18.5 Suitability of surface mount IC packages for wave and reflow soldering methods 19 DATA SHEET STATUS 20 DEFINITIONS 21 DISCLAIMERS 22 PURCHASE OF PHILIPS I 2 Preliminary specification SAA7715AH 2 C COMPONENTS ...
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... Multichannel decoding: Dolby Pro Logic and virtual 3D surround PC/USB audio applications: stereo widening (Incredible surround), sound steering, sound positioning and speaker equalization. 3 Preliminary specification SAA7715AH ...
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... Philips Semiconductors Digital Signal Processor 3 GENERAL DESCRIPTION The SAA7715AH is a cost effective and powerful high performance 24-bit programmable DSP for a variety of digital audio applications. This DSP device integrates a 24-bit DSP core with programmable memories (program RAM/ROM, data and coefficient RAM), 4 digital serial ...
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... Acrobat reader. white to force landscape pages to be ... handbook, full pagewidth IIS_BCK1 2 IIS_WS1 3 IIS_IN1 5 IIS_IN4 SAA7715AH 6 IIS_IN2 9 IIS_IN3 2 S PLL XRAM YRAM DSP CORE STEREO DAC PRAM PROM DSP CLOCK ...
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... SPDIF2 data input (internally multiplexed with digital serial input 3) SPDIF1 data input (internally multiplexed with digital serial input 2) scan control active HIGH (internal pull down output of SAA7715AH s data pin of digital serial output 4 data pin of digital serial output 3 data pin of digital serial output 2 ...
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... CLK_IN by two digital input/output flag of the DSP-core (F5 of the status register) digital input/output flag of the DSP-core (F6 of the status register) digital input/output flag of the DSP-core (F7 of the status register) EXPLANATION 2 C-bus specification tolerant 7 Preliminary specification SAA7715AH ...
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... Philips Semiconductors Digital Signal Processor handbook, full pagewidth IIS_BCK1 IIS_WS1 IIS_IN1 RESERVED1 IIS_IN4 IIS_IN2 RESERVED2 RESERVED3 IIS_IN3 V SSI2 A0 2003 Mar SAA7715AH Fig.2 Pin configuration. 8 Preliminary specification SAA7715AH 33 IIS_BCK 32 IIS_WS 31 IIS_OUT1 30 IIS_OUT2 29 IIS_OUT3 28 IIS_OUT4 27 SYSCLK 26 TSCAN SPDIF1 25 24 SPDIF2 V DDE 23 MHC319 ...
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... Mar 13 pll_div[4:0] N 10H 272 09H 227 03H 198 00H 181 10H 272 0BH 244 09H 227 00H 181 (kHz) s sel0 SYSCLK ( Preliminary specification SAA7715AH 2 C-bus (see dsp_turbo DIV_CLK_IN clock. The memory map of the I s sel_loop_div[1: IIS_WS1) DUTY FACTOR 512 50% for kHz input ...
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... It shifts The flags DSP_INOUT5 to DSP_INOUT7 are available as s external pins. The flags can be used by the DSP depending on the downloaded software. 10 Preliminary specification SAA7715AH P OWER OFF PLOP SUPPRESSION P VREFDA IN FOR INTERNAL REFERENCE S UPPLY OF THE ANALOG OUTPUTS ...
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... For communication with external digital sources a digital serial bus is implemented serial 3-line bus, having one line for data, one line for clock and one line for the word select. For external digital sources the SAA7715AH acts as a slave, so the external source is master and supplies the clock. ...
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Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATA MSB B2 MSB INPUT ...
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... C-bus format is described in “The I The I to use it” , order no. 9398 393 40011. For the external control of the SAA7715AH a fast I is implemented. This is a 400 kHz bus which is downward compatible with the standard 100 kHz bus. There are two different types of control instructions: ...
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... Slave address (pin A0) The SAA7715AH acts as a slave receiver or a slave transmitter. Therefore the clock signal SCL is only an input signal. The data signal SDA is a bidirectional line. The slave address is shown in Table 6. ...
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... Sr = repeated START condition STOP condition. ACK = acknowledge from SAA7715AH (SDA LOW repeat n-times the bytes data group Negative Acknowledge master (SDA HIGH). ADDR H and ADDR L = address DSP register. DATA 1 to DATA bytes data word. Fig.6 Master transmitter reads from the SAA7715AH registers ADDR L C ...
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... Philips Semiconductors Digital Signal Processor 9.5 Program RAM The SAA7715AH has a 1.5 kbyte PRAM to store the DSP instruction code into. Also a 2 kbyte PROM is on-chip available and can be accessed (memory mapped) without the need of selecting the PROM or PRAM. The DSP instruction code can be downloaded into the PRAM via the ...
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... XRAM of DSP. Table 9 shows the detailed memory map of those locations. All locations are acknowledged by the SAA7715AH even if the user tries to write to a reserved space. The data in these sections will be lost. Reading from these locations will result in undefined data words. ...
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... CLK_IN s output on pin SYSCLK 1: disable 0: enable signal on pin SYSCLK 1: fixed 256f clock clock; determined by bits reserved DESCRIPTION channel status SPDIF in right LSB bits DESCRIPTION channel status SPDIF in right MSB bits Preliminary specification SAA7715AH BIT DEFAULT POSITION 0 0 00011 010 ...
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... SPDIF1 0: digital serial input 2 SPDIF2 or digital serial input 3 1: SPDIF2 0: digital serial input 3 select channel status information taken from SPDIF1 or SPDIF2 1: from input SPDIF2 0: from input SPDIF1 reserved 19 Preliminary specification SAA7715AH BIT DEFAULT POSITION 00000H BIT DEFAULT POSITION 00000H BIT ...
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... BIT Preliminary specification SAA7715AH 0050C6H 0010DBH 000000H 000000H 000000H 000000H INPUT 2 standard I S-bus LSB-justified, 16 bits LSB-justified, 18 bits LSB-justified, 20 bits LSB-justified, 24 bits OUTPUT 2 standard I S-bus LSB-justified, 16 bits LSB-justified, 18 bits LSB-justified, 20 bits LSB-justified, 24 bits ...
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... Mar 13 CONDITIONS V < 0 > 0 < 0 > 0 0.5 V < V < 0 note 1 note 2 CIC specification/test method CONDITIONS mounted on printed-circuit board 21 Preliminary specification SAA7715AH MIN. MAX. UNIT 0.5 +3.6 V 0 +125 C 200 V 2000 V 100 mA 600 mW VALUE ...
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... POWERDOWN enabled = 3.15 to 3.45 V; unless otherwise specified DD standard output slew rate output slew rate output slew rate output Preliminary specification SAA7715AH MIN. TYP. MAX. 3.15 3.3 3. 6.5 13 250 13.5 27 380 400 2.0 0.8 0.4 V 0.4 ...
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... C-bus output 400 3.3 V; unless otherwise specified amb DDA2 at 1 kHz = 44.1 kHz all voltages referenced to ground; s amb L (THD + N)/S < 0. Preliminary specification SAA7715AH MIN. TYP. MAX. 0.4 0.4 0.4 0.4 0 140 30 50 100 3.5 6 200 3 300 0.2 ...
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... Digital Signal Processor SYMBOL PARAMETER (THD + N)/S total harmonic distortion plus noise-to-signal ratio S/N signal-to-noise ratio channel separation cs PSRR power supply rejection ratio 2003 Mar 13 CONDITIONS MIN code = kHz; ripple ripple(p-p) 24 Preliminary specification SAA7715AH TYP. MAX. UNIT 85 dB(A) 37 dB(A) 100 dB( ...
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... T su(WS) t word select hold time h(WS) 2003 Mar 13 RIGHT h(WS) t d(D) t BCK(L) LSB LSB CONDITIONS Preliminary specification SAA7715AH LEFT t su(WS) t su(D) t h(D) MSB MSB MIN. TYP. MAX. 162 0.15T cy 0.15T cy 0.35T cy 0.35T cy 0.2T cy 0.2T cy 0.15T cy 0.2T cy 0.2T cy MGM129 UNIT ...
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... Sr 2 Fig.8 Timing of the I C-bus. STANDARD MODE CONDITIONS MIN. 0 4.7 4.0 4.7 4.0 4.7 0 250 4.0 not applicable 26 Preliminary specification SAA7715AH t HD;STA SU;STO P 2 FAST MODE I C-BUS 2 I C-BUS MAX. MIN. MAX. 100 0 400 1.3 0.6 1.3 0.6 0.6 0 0.9 ...
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... Acrobat reader. white to force landscape pages to be ... SPDIF input signals 75 75 100 nF 100 nF 100 pF 100 IIS_BCK1 1 IIS_WS1 2 IIS_IN1 3 IIS_IN4 5 digital SAA7715AH inputs IIS_IN2 6 IIS_IN3 DSP CLOCK PLL 22 41 (1) Omit this capacitor when a microcontroller is used. 100 100 100 ...
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... Mar 2.5 scale (1) ( 0.4 0.25 10.1 10.1 12.9 0.8 0.2 0.14 9.9 9.9 12.3 REFERENCES JEDEC JEITA 28 Preliminary specification detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION SAA7715AH SOT307 (1) ( 1.2 1 0.8 0.8 0 ISSUE DATE 97-08-01 03-02-25 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 29 Preliminary specification SAA7715AH ...
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... Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2003 Mar 13 (1) not suitable not suitable suitable not recommended not recommended 30 Preliminary specification SAA7715AH SOLDERING METHOD (2) WAVE REFLOW suitable (3) suitable suitable (4)(5) suitable ...
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... Preliminary specification SAA7715AH DEFINITIONS These products are not Philips Semiconductors ...
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... Philips. This specification can be ordered using the code 9398 393 40011. 2003 Mar 13 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 32 Preliminary specification SAA7715AH 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors Digital Signal Processor 2003 Mar 13 NOTES 33 Preliminary specification SAA7715AH ...
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... Philips Semiconductors Digital Signal Processor 2003 Mar 13 NOTES 34 Preliminary specification SAA7715AH ...
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... Philips Semiconductors Digital Signal Processor 2003 Mar 13 NOTES 35 Preliminary specification SAA7715AH ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited ...