PEB3465-V1.2 Infineon Technologies AG, PEB3465-V1.2 Datasheet
PEB3465-V1.2
Related parts for PEB3465-V1.2
PEB3465-V1.2 Summary of contents
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... Edition 2000-07-14 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 16. 8. 00. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein ...
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PEB 3465 PRELIMINARY Revision History: Previous Version: Page Subjects (major changes since last revision) For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage ...
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Table of Contents 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Figures Figure 1 Application of an Analog Linecard for 16 Subscribers using MuSLIC . . 8 Figure 2 Pin Configuration (Top View ...
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List of Tables Table 1 MuSLIC Chip Set ICs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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PRELIMINARY 1 General Description The highly integrated MuSLIC chip set supports to realize an extremely compact Analog Subscriber Line Interface Module. Only a few external components are required and there is no trimming or adjustment necessary to meet worldwide recommendations. ...
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PRELIMINARY Quad Analog POTS QAP Version 1.2 1.1 Features • Four channel analog frontend for POTS • Only a few external components are required • No trimming or adjustments are required • Advanced low power BiCMOS • High performance AD ...
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PRELIMINARY 1.2 Pin Configuration (Top View VDD-A O1-A GND-A I/O1-A I/O2-A I1-A NC VBIM VB VA VDDZ GNDZ VSS RREF I1-B I/O2-B I/O1-B GND-B O1-B VDD ...
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PRELIMINARY 1.2.1 Pin Definition and Functions The following tables group the pins according to their functions. They include pin number, pin name, type, a brief description of the function, and cross-references referring to the sections in which the pin functions ...
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PRELIMINARY Table 2 Pin Definition and Functions (Continued) Pin No. Name Type Interface to AHV-SLIC 71 IT ITAC VR IL ACP ACN DCP DCN ...
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PRELIMINARY Table 2 Pin Definition and Functions (Continued) Pin No. Name Type 39 C1-C I ITAC VR IL ACP ACN DCP ...
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... Unused fixed input pin should be terminatedd with pull up or pull down. Unused programmable pins should be programmed to output the PEB3465 is used together with the AHV-SLICs PEB4164 or PEB4166 it is recommended to use the IO2- Pin to drive the C3-Pin of the SLIC. Data Sheet Function User-programmable I/O pin, channel A ...
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PRELIMINARY 1.2.2 Functional Block Diagram VDD GND ITAC Prefi ACP Buffer ACN Prefi DCP Buffer DCN C1 HV- Interface I/O1 I/O2 VDD GND ITAC ...
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PRELIMINARY 1.2.3 Application Diagrams V V +5V - BAT BAT2 3*100n 2*1µ BGND AGND V +5V - BAT BAT R R PT2 PT1 50 50 TIP 18n / ...
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PRELIMINARY Table 3 List of Components in Application Circuits Symbol min PT1 PT2 R 30 PR1 R 0 PR2 QIO R MIO ...
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PRELIMINARY 2 Functional Description The Multichannel Signal Processing Subscriber Line Interface Codec Filter chip set, MuSLIC logic Infineon Technologies PCM-Codec-Filter-ICs with the integration of all DC-feeding, supervision and meterpulse injection features on chip as well. Fabricated in advanced ...
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... RFIX2 AR 2 PEB31664 / PEB31665 / PEB31666 Receive Path fixed filter block not available in PEB 31664 -converter. The first down sampling steps are done 19 PEB 3465 D HPX PCM / XFIX1 FIX TH TG1 TG 2 PCM / RFIX1 FRR AR 1 EXP DH PR peb3465_0001_ac-work graph.emf 2000-07-14 O utput Input ...
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PRELIMINARY Receive Path The digital input signal is received via the PCM / IOM-2 Interface of the MuPP. Expansion, PCM-lowpass-filtering, gain correction and frequency response correction are the next steps which are done by the DSP-machine. This 64 kHz AC ...
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PRELIMINARY DC Characteristic The incoming information (transmit direction) at pin IT (scaled transversal AC + DC- current, transferred to a voltage via an external 1.5 k antialiasing filter and is then converted to a 1-bit digital data stream in the ...
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PRELIMINARY 3 Interfaces 3.1 MuPP/QAP Interface The MuPP/QAP-Interface, the link between MuPP and QAP is a serial interface based on the 6 signals AFSC (analog frame sync), ADCL (analog data clock), ADU1/ADU2 (analog data upstream) and ADD1/ADD2 (analog data downstream). ...
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PRELIMINARY 3.2 QAP/AHV-SLIC Interface Output Voltage AC (ACP, ACN) The output voltage at the pins ACP and ACN represents the AC-information together with Teletax information at the receive path. The AC-information is received via the MuPP/QAP-Interface in the ADD channel. ...
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PRELIMINARY interface (PEB 31666, PEB 31664) via the MuPP/QAP-interface to the ternary AHV- SLIC interface pins C1 and C2. Data Sheet 24 PEB 3465 2000-07-14 ...
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PRELIMINARY 4 Electrical Characteristics 4.1 Absolute Maximum Ratings Parameter VDDA-VDDD referred to GNDA-GNDD VDDI referred to GNDI VSS referred to all GND pins GNDA-GNDD to GNDI VDDA-VDDD to VDDI Analog input and output voltages referred to VDD = 5 V; ...
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PRELIMINARY 4.2 Operating Range VDDA...VDDD, VDDZ = 5 V ± 5%; VDDI= 3.3 V ± 5% VSS = - 5 V ± 10%; all GND’ Parameter Symbol V supply current DD Power down digital IDDD Power down ...
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PRELIMINARY 4.3 Electrical Parameters Functionality and performance is guaranteed for testing. Extended temperature range operation at – 40 °C < design, characterization and periodically sampling and testing production devices at the temperature extremes. The target figures in this specification are ...
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PRELIMINARY 4.3.1 Transmission Values all VDD´ 5%; VSS = ± Parameter Symbol Absolute Gain (f = 300..3400 Hz) transmit (AG6dB = 0) GX0 receive (AG6dB = 0) GR0 transmit (AG6dB = 1) GXG receive (AG6dB = 1) GRG ...
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PRELIMINARY Frequency Response 1. Transmit: reference frequency 1 kHz, signal level .3 1 0.2 0 -0.2 tbd -2.1 -2.4 -2.7 Figure 10 Frequency Response Transmit 2. Receive: reference frequency 1 kHz, signal level .3 1 0.2 ...
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PRELIMINARY 3. Out-of-Band Signals at Analog Output (Receive) With a 0 dBm0 sine wave with frequency f (300 Hz to 3.4 kHz) applied to the digital input, the level of any resulting out-of-band signal at the analog output will stay ...
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PRELIMINARY Total Distortion The signal to distortion ratio exceeds the limits in the following figures: 1. Receive: measured with sine wave f = 1004 Hz -72 Figure 13 Total Distortion Receive Table 4 Total Distortion Receive Parameter Symbol ...
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PRELIMINARY 2. Transmit: measured with sine wave f = 1004 -72 Figure 14 Total Distortion Transmit Table 5 Total Distortion Receive Parameter Symbol Signal to distortion SD T Data Sheet -36 Input level Limit Values Unit Test ...
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PRELIMINARY 4.3.2 DC Characteristics I/O-Pins V V all ’ 5 Parameter Digital input pins ADCL, AFSC, ADD, ADR, RESET Low - input voltage High - input voltage Input leakage current Spike rejection for RESET digital ...
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PRELIMINARY DC-Feeding 1500 U 1.1822 1.8915 V DC Figure 15 DC-Feeding Test Circuit With dBm0DC| IT QAP With dBm0DC| DC QAP Data Sheet QAP IT VR PEB 3465 DCP DCN ...
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PRELIMINARY V V all ’ Parameter Symbol “Line Current” Measurement (IT): V Transmit V V Additional gain variation with temperature 40° 85° – “Line Voltage” Feeding (DCP, DCN): V Receive V ...
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PRELIMINARY DC-Frequency Response 1. Transmit: reference frequency 50 Hz, signal level 0dBm0 50 0.5 0 -0.5 -0.65 Figure 16 Frequency Response Transmit 2. Receive: reference frequency 50 Hz, signal level 0dBm0 50 0.5 0 -0.5 -0.55 Figure 17 Frequency Response ...
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PRELIMINARY AHV-SLIC Interface & Supervision Functions all V ’ 5 Parameter Symbol Output voltage: AHV-SLIC- Interface C1 High level OHHV V Mid level OMHV V Low level OLHV Current drained I OTLo ...
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PRELIMINARY 50 0.5 -0.5 -1.1 -1.5 Figure 18 Frequency Response: Longitudinal Current Input & Auxiliary Inputs Data Sheet 300 Hz Frequency 38 PEB 3465 ezm17006.emf 2000-07-14 ...
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PRELIMINARY 4.3.3 MuPP-Interface Timing Characteristics t ADCL ADCL t t AFSC_H AFSC_S AFSC t t ADD_H ADD_S ADD ADU Figure 19 MuPP-Interface Timing Characteristics Parameter Period ADCL ADCL duty cycle Period AFSC AFSC setup AFSC hold ADD setup time ADD ...
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PRELIMINARY 5 Package Outlines P-MQFP-80-1 (Plastic Metric Quad Flat Package) 0.65 0.3 ±0. Index Marking 1) Does not include plastic or metal protrusions of 0.25 max per side Figure 20 Package Outline: PEB 3465 (QAP) Sorts of ...
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PRELIMINARY 6 Glossary ACT Active Mode ADC Analog Digital Converter AGR Attenuation Receive AGX Attenuation Transmit AHV-SLIC Advanced High Voltage Subscriber Line Interface Circuit BB Boosted Battery BiCMOS Bipolar Complementary Metal Oxid Semiconductor C1, 2 Digital Interface between QAP and ...
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PRELIMINARY PCM Pulse Code Modulation POTS Plain Old Telephone Service PREFI Antialiasing Pre Filter QAP Quad Analog POTS RNG Ring Generator SLIC Subscriber Line Interface Circuit TST1 Test Pin TH Transhybrid Balancing THFIX Transhybrid Balancing Filter (fixed) TTX Teletax TTXGEN ...
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... Better operating results and business excellence mean less idleness and wastefulness for all of us, more professional success, more accurate information, a better overview and, thereby, less frustration and more satisfaction.” Dr. Ulrich Schumacher Published by Infineon Technologies AG ...