TDA4841PS NXP Semiconductors, TDA4841PS Datasheet
TDA4841PS
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TDA4841PS Summary of contents
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... DATA SHEET TDA4841PS 2 I C-bus autosync deflection controller for PC monitors Product specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1999 Oct 25 ...
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... C-bus controllable output for horizontal and vertical parabolas Vertical parabola is independent of frequency and tracks with vertical adjustments Horizontal parabola independent of frequency Adjustable pre-correction of delay in focus output stage. and f by external max 2 Product specification TDA4841PS 2 C-bus controllable vertical sawtooth and 2 C-bus. ...
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... ORDERING INFORMATION TYPE NUMBER NAME TDA4841PS SDIP32 1999 Oct 25 The TDA4841PS provides extended functions e. flexible B+ control, an extensive set of geometry control facilities, and a combined output for horizontal and vertical focus signals. Together with the I processor family, a very advanced system solution is offered. PARAMETER ...
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... HORIZONTAL SIZE HORIZONTAL PINCUSHION AND AGC AND HORIZONTAL CORNER VERTICAL SIZE HORIZONTAL TRAPEZIUM HORIZONTAL SIZE VERTICAL POSITION VERTICAL SIZE, VOVSCN PROTECTION AND SOFT START TDA4841PS 2 I C-BUS REGISTERS COINCIDENCE DETECTOR X-RAY FREQUENCY DETECTOR PROTECTION PLL2, PARALLELOGRAM, HORIZONTAL PIN UNBALANCE AND OSCILLATOR ...
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... HREF 28 reference current for horizontal oscillator HCAP 29 external capacitor for horizontal oscillator HPLL2 30 external filter for PLL2/soft start HSMOD 31 input for EHT compensation (via horizontal size) FOCUS 32 output for horizontal and vertical focus 1999 Oct 25 DESCRIPTION 5 Product specification TDA4841PS ...
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... No horizontal flyback pulses at HFLB (pin 1) X-ray protection is activated Supply voltage Via I C-bus control, horizontal unlock blanking can be switched off by control bit BLKDIS while vertical blanking is maintained. 6 Product specification TDA4841PS 2 C-bus control, 2 C-bus control, two 2 C-bus) (pin 10) is low (see Fig.22). CC ...
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... R 2% HBUF 7% f 1.07 96.3 kHz = = sync max f sync min = = 28.4 kHz ---------------------- - 1.09 and R can be calculated with HREF HBUFpar 78 kHz k = ----------------------------------------------------------------- 0.0012 f kHz min min 78 kHz k = ------------------------------------------------------------------- - 0.0012 f kHz max max Product specification TDA4841PS have to be max for f min 2. 726 ...
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... mA. To protect the line deflection transistor, the output stage is disabled (floating) for low supply voltage at V The duty cycle of line drive pulses is slightly dependent on the actual horizontal frequency. This ensures optimum drive conditions over the whole frequency range. 8 Product specification TDA4841PS (see Fig.26). CC ...
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... VOUT1 and VOUT2; VSMOD does not affect the EW waveforms, vertical focus, pin unbalance and parallelogram corrections. Product specification TDA4841PS and 10% fr( 19% ...
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... HREF I HSMOD with V = ------------------- - 0.69 HEHT 120 A V HSIZE g HSIZE,HSMOD ( ) 1 = – ------------------------------------------------------------------------ - I HREF and ------------------------------------ - HREF I HREF kHz 10 Product specification TDA4841PS , HSMOD in the EWDRV output caused by I will be HSMOD as shown in the equation + V f HSIZE ( ) HEHT g HSIZE,HSMOD ( ) V HSIZE , f HSIZE ( ) = 1 – ---------------- - 14 HSIZE – ---------------- - HEHT 14 ...
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... VFOCUS. FOCUS (pin 32) is designed as a voltage output for the superimposed vertical and horizontal parabolas. B+ control function block The B+ control function block of the TDA4841PS consists of an Operational Transconductance Amplifier (OTA), a voltage comparator, a flip-flop and a discharge circuit. This configuration allows easy applications for different B+ control concepts. See also Application Note AN96052: “ ...
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... Oct 25 Supply voltage stabilizer, references, start-up procedures and protection functions The TDA4841PS provides an internal supply voltage stabilizer for excellent stabilization of all internal references. An internal gap reference, especially designed for low-noise, is the reference for the internal horizontal and vertical supply voltages ...
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... The acknowledge will only be given on the data if the IC is active. Due to this behaviour the start-up of the TDA4841PS is defined as follows: the first data that is transferred to the deflection controller must be sent to the control register with subaddress 1AH. Any other subaddress will not lead to an acknowledge ...
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... V emission test EMC immunity test Note 1. Tests are performed with application reference board. Tests with other boards will have different results. 1999 Oct 25 PARAMETER PARAMETER PARAMETER 14 Product specification TDA4841PS CONDITIONS MIN. MAX. 0.5 +16 0.5 +6.0 0.5 +6.5 0.5 +8.0 0.5 +8 ...
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... 0.52 mA HREF f = 31.45 kHz 1.052 mA HREF kHz 2.141 mA HREF f = 100 kHz 3.345 mA HREF 0 V < V i(VSYNC) 15 Product specification TDA4841PS MIN. TYP. 1.7 1 VIDEO NEGATIVE SYNC POLARITY 300 90 120 1.1 1.28 1.7 2.4 clamp(HSYNC) 0 ...
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... CLAMP = 1; measured CLBL notes 1 and 2 1.7 control bit VBLK = 0 220 control bit VBLK = 1 305 0.59 CLBL 2.4 16 Product specification TDA4841PS TYP. MAX. UNIT 400 s 1.8 ms 0.7 0.8 s 4.75 5. mV/K 50 ns/V 130 ns 1 ...
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... PLL1 locked = 1 V HUNLOCK case of HUNLOCK unlocked PLL1 and/or protection active notes 4 and 5 locked mode; level 1 locked mode; level 2 minimum horizontal frequency maximum horizontal frequency 17 Product specification TDA4841PS TYP. MAX. UNIT 31.45 32.39 kHz 3 +100 10 /K 130 kHz 2.55 2.68 ...
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... MOD = 0 register HMOIRE = 63; control bit MOD = 0 control bit MOD = 1 maximum advance; 36 register HPINBAL = 32; register HPARAL = 32 minimum advance; register HPINBAL = 32; register HPARAL = 32 V < 3.7 V HPLL2 V < 3.7 V HPLL2 18 Product specification TDA4841PS TYP. MAX. UNIT 1.2 % 1.2 % 0.02 % 1 ...
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... V < 6. XRAY V > 6. XRAY standby mode pin 9 open-circuit or connected to GND pin 9 connected XSEL pin 9 connected XSEL pin 9 connected XSEL no reset via I 19 Product specification TDA4841PS MIN. TYP. 5.5 0.75 2 45.5 48 6.22 6.39 500 set control bit SOFTST via I via switch off V ...
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... VOVSCN = 0; note 8 register VSIZE = 0; register VGAIN = 63; bit VOVSCN = 1; note 8 register VSIZE = 127; register VGAIN = 63; bit VOVSCN = 1; note i(VSMOD 120 A i(VSMOD) VSMOD = 0 VSMOD = i(VSMOD) (RMS) 20 Product specification TDA4841PS MIN. TYP. MAX. UNIT ) fr( 43.3 Hz 160 Hz 3.0 V 220 260 300 s 305 350 ...
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... MOD = 0 2 register VMOIRE = 63; control bit MOD = 0 control bit MOD = VOUT VOUT1 nominal settings; note 8 control bit VOVSCN = 1 nominal settings; note 8 nominal settings; note 8 21 Product specification TDA4841PS MIN. TYP. MAX 0.25 11.5 11.5 0. 0.7 1.85 1.40 ...
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... HTRAP = 0; note 8 register HTRAP = 32; note 8 register HSIZE = 255; note 8 register HSIZE = 0; note note 8 HSMOD I = 120 A; note 8 HSMOD V = 0.02 V HEHT V = 0.69 V HEHT 300 i(HSMOD i(HSMOD (RMS) 22 Product specification TDA4841PS TYP. MAX. UNIT 1.2 1. 600 10 /K 0.04 V 1.42 V 0 0 ...
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... FHMULT = 0; note 10 register HPARAL = 0; note 8 register HPARAL = 63; note 8 register HPARAL = 32; note 8 register HPINBAL = 0; note 8 register HPINBAL = 63; note 8 register HPINBAL = 32; note 8 V 1.9 V o(ASCOR) V 1.9 V o(ASCOR) 23 Product specification TDA4841PS TYP. MAX. UNIT 80 kHz 0.72 V 1. 0.825 V 0.825 V 0. ...
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... HFOCUS = 0 register HFOCUS = 31 register VFOCUS = 0; note 8 register VFOCUS = 15; note o(FOCUS o(FOCUS) BIN BOP PINS AND I < o(BOP) note 11 note 12 24 Product specification TDA4841PS MIN. TYP. MAX. UNIT 300 ns 350 ns 400 ns 450 ns 1.9 s 7.5 s 5.5 s 0.06 V 3 ...
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... V BSENS fault condition STDBY = 1; V 3.5 V < kHz V decreasing from decreasing from increasing from below CC typical 8 decreasing from CC above typical 8 Product specification TDA4841PS MIN. TYP 250 500 = 3 V 0.85 1.0 4.5 6.0 1.2 1.3 2 9.2 70 < PLL2 < 8.2 8 ...
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... All vertical and EW adjustments according note 8, but VSIZE = 80% (register VSIZE = 63, VGAIN = 63 and control bit VOVSCN = 0). 7. Value of resistor at VREF (pin 23) may not be changed. 1999 Oct 25 CONDITIONS VOLTAGE 2 C-bus )”. fr(V) 26 Product specification TDA4841PS MIN. TYP. MAX. UNIT 4.6 V 4.0 V 3 ...
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... V BOP 12. Open-loop gain with no resistive load and C ------------- - V BIN 13. The recommended value for the pull-up resistor at pin 6 (BDRV 1999 Oct 25 . The EWDRV low level of 1.2 V remains fixed. HREF = 10 nF (from BOP (pin 3) to GND). BOP 27 Product specification TDA4841PS ...
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... VGAIN = 63, control bit VOVSCN = 0. VGAIN = ------- - Fig.4 Adjustment of vertical size. MBG592 handbook, halfpage I VOUT1 I VOUT2 ( ( the maximum amplitude setting at register VSIZE = 127 1 and VLIN = 0 VLIN = --------------------- - Fig Product specification TDA4841PS MGS274 100 ( – 100 and I as functions of time. VOUT1 VOUT2 ( MBG594 ...
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... V EWDRV Fig.9 Influence of corner correction at pin EWDRV. 1999 Oct 25 MGM068 handbook, halfpage V EWDRV ( Fig.8 Parabola amplitude at pin EWDRV as a function of time. MGM070 handbook, halfpage V EWDRV V HCOR(EWDRV) t Fig.10 Influence of trapezium at pin EWDRV. 29 Product specification TDA4841PS MGM069 V HPIN(EWDRV) t MGM071 V HTRAP(EWDRV) t ...
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... V EWDRV Fig.11 Influence of HSIZE and EHT compensation at pin EWDRV. handbook, halfpage V ASCOR V c(ASCOR) Fig.13 Adjustment of pin balance at pin ASCOR. 1999 Oct 25 MGM072 handbook, halfpage V ASCOR V c(ASCOR) V HSIZE(EWDRV) V HEHT(EWDRV) t Fig.12 Adjustment of parallelogram at pin ASCOR. MGM074 V HPINBAL(ASCOR Product specification TDA4841PS MGM073 V HPARAL(ASCOR) t ...
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... VOUT1 (pin 13) and VOUT2 (pin 12) EW drive waveform at EWDRV (pin 11) 1999 Oct 25 4.0 V automatic trigger level 3.8 V synchronized trigger level 1.4 V inhibited I VOUT1 I VOUT2 DC shift 3.6 V maximum Fig.14 Pulse diagram for vertical part. 31 Product specification TDA4841PS 7.0 V maximum low-level 1.2 V fixed MGM075 ...
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... HFLB (pin 1) PLL2 control current at HPLL2 (pin 30) line drive pulse at HDRV (pin 8) horizontal focus parabola at FOCUS (pin 32) 1999 Oct PLL2 control range 45 to 52% of line period Fig.15 Pulse diagram for horizontal part. 32 Product specification TDA4841PS - vertical blanking level – MGS275 ...
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... CLBL (pin 16) b. Generation of video clamping pulses during vertical sync with serration pulses. Fig.17 Pulse diagrams for composite sync applications. 1999 Oct 110 time of HDRV as a function of horizontal frequency. OFF 33 Product specification TDA4841PS MGM077 130 f H (kHz) MGC947 MBG596 ...
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... To avoid this kind of interference, at least the adjustment of some critical geometry parameters should be synchronized with the vertical flyback. The TDA4841PS offers a feature to 2 synchronize any I C-bus adjustment with the internal vertical flyback pulse ...
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... HPLL2) Notes don’t care this bit is occupied by another function. If the register is addressed, the bit values for both functions must be transferred. 3. Bits STDBY and SOFTST can be reset by the internal protection circuit. 1999 Oct 25 FUNCTION (HEX) 35 TDA4841PS REGISTER ASSIGNMENT SAD1 SAD2 (HEX ...
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Acrobat reader. white to force landscape pages to be ... 2 List of I C-bus controlled functions 2 I C-bus data can be transmitted ...
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Acrobat reader. white to force landscape pages to be ... SAD1 FUNCTION NAME BITS (HEX) Moire cancellation via VMOIRE 6 00 vertical position Moire ...
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... Setting control bit SOFTST = 0 is the only way (except yes power-down via pin V (1) L4 Soft-down sequence: MGL791 See L4 of Fig.19 for starting the soft-down sequence. 38 Product specification TDA4841PS < 8.6 V register SOFTST cannot be set C-bus 2 C-bus data transfer as follows leave the operating mode. CC ...
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... Set control bit STDBY = 1 Driver outputs are floating (same as protection mode) Supply current Only the I C-bus section and protection circuits are operative Contents of all registers are lost, except the value of bit STDBY and bit SOFTST See L2 of Fig.18 for continuation. Product specification TDA4841PS ...
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... C-bus transmission chip address subaddress S 8CH A 0XH A yes acknowledge was given on data C-bus transmission chip address subaddress S 8CH A 0XH A yes acknowledge was given on data? no Standby mode Fig.21 Possible standby mode detection. Product specification TDA4841PS data XXH A P data XXH A P MGS276 ...
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... STDBY = 0 continuous blanking (pin 16 and 17) activated a. Start-up sequence. 8.6 V continuous blanking (pin 16 and 17) activated PLL2 soft-down sequence is triggered 8 data accepted from I video clamping pulse disabled 3 Shut-down sequence. 41 TDA4841PS MGM082 continuous blanking off (1) PLL2 soft start/soft-down enabled 2 C-bus time MGM083 (2) 2 C-bus ...
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... BDRV duty cycle begins to decrease 2.8 V BDRV floating HDRV duty cycle begins to decrease 1.8 V 1.0 V VOUT1 and VOUT2 floating b. Soft-down sequence for V < 8 Product specification TDA4841PS MHB495 continuous blanking off PLL2 enabled frequency detector enabled HDRV/HFLB protection enabled time > 8.6 V. MHB496 (1) (1) ...
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... I C-bus autosync deflection controller for PC monitors handbook, full pagewidth V XRAY V HUNLOCK BDRV duty cycle HDRV duty cycle VOUT1, VOUT2 Fig.24 Activation of soft-down sequence via pin XRAY. 1999 Oct 25 X-ray latch triggered approximately Product specification TDA4841PS floating floating floating MGM087 ...
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... Oct HDRV V HPLL2 SOFT START OTA 2 BIN V BOP 4 V BSENS BOP Feedback mode application. Fig.25 Application and timing for feedback mode. 44 Product specification TDA4841PS ( BDRV TR1 R Q INVERTING BUFFER DISCHARGE R5 t off(min) V RESTART(BSENS) V STOP(BSENS) MBG600 c. Waveforms for fault condition. L ...
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... Forward mode application. V BOP Fig.26 Application and timing for feed forward mode ( INVERTING HORIZONTAL BUFFER OUTPUT Q STAGE Q EHT transformer V BDRV 3 TR1 R3 t off (discharge time of C BSENS ) c. Waveforms for fault condition. Product specification TDA4841PS horizontal flyback pulse MOSFET MGM081 V RESTART(BSENS) V STOP(BSENS) MBG602 ...
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... Line flyback pulse at HFLB (pin 1). (2) Horizontal focus parabola at FOCUS (pin 32). 1999 Oct 25 (1) I VOUT ( A) 415 ( 415 I I – -------------- I 0 Fig.27 Definition of vertical linearity error. (1) (2) t precor = 450 ns t precor = 300 ns Fig.28 Definition of H-focus pre-correction. 46 TDA4841PS MBG551 (3) ( VCAP MGS282 Product specification ...
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... B-drive line in parallel to ground SMD For optimum performance of the TDA4841PS the ground paths must be routed as shown. Only one connection to other grounds on the PCB is allowed. Note: The tracks for HDRV and BDRV should be kept separate. 1999 Oct 25 further connections to other components ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors INTERNAL PIN CONFIGURATION PIN SYMBOL 1 HFLB 2 XRAY 3 BOP 4 BSENS 1999 Oct 25 INTERNAL CIRCUIT 1 MBG562 Product specification TDA4841PS MBG561 6.25 V 5.3 V MBG563 MBG564 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 5 BIN 6 BDRV 7 PGND power ground, connected to substrate 8 HDRV 9 XSEL EWDRV 1999 Oct 25 INTERNAL CIRCUIT 5 MBG565 6 MBG566 8 MGM089 MBK381 10 MGM090 108 11 108 MBG570 49 Product specification TDA4841PS ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 12 VOUT2 13 VOUT1 14 VSYNC 15 HSYNC 16 CLBL 1999 Oct 25 INTERNAL CIRCUIT MBG571 12 MBG572 13 100 14 1 7 MBG575 50 Product specification TDA4841PS MBG573 1.4 V MBG574 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 17 HUNLOCK 18 SCL 19 SDA 20 ASCOR 21 VSMOD 1999 Oct 25 INTERNAL CIRCUIT 17 MGM091 18 MGM092 19 MGM093 480 20 MGM094 250 MGM095 51 Product specification TDA4841PS ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 22 VAGC 23 VREF 24 VCAP 25 SGND signal ground 26 HPLL1 27 HBUF 1999 Oct 25 INTERNAL CIRCUIT MBG582 24 MBG583 26 4 MGM097 52 Product specification TDA4841PS MBG581 MGM096 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 28 HREF 29 HCAP 30 HPLL2 1999 Oct 25 INTERNAL CIRCUIT HFLB 53 Product specification TDA4841PS 2.525 V MBG585 6.25 V MGM098 ...
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... HSMOD 32 FOCUS Electrostatic discharge (ESD) protection pin Fig.30 ESD protection for pins 13, 16 and 17. 1999 Oct 25 INTERNAL CIRCUIT 31 MBG559 Fig.31 ESD protection for pins Product specification TDA4841PS 250 5 V MGM099 120 32 200 120 MGM100 pin 7.3 V 7.3 V and 26 to 32. MBG560 ...
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... Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT232-1 1999 Oct scale (1) ( 1.3 0.53 0.32 29.4 9.1 0.8 0.40 0.23 28.5 8.7 REFERENCES JEDEC EIAJ 55 Product specification TDA4841PS 3.2 10.7 12.2 1.778 10.16 2.8 10.2 10.5 EUROPEAN PROJECTION SOT232-1 M ...
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... If the temperature of the soldering iron bit is less than 300 C it may remain in contact for seconds. If the bit temperature is between 300 and 400 C, contact may seconds. SOLDERING METHOD DIPPING suitable 56 Product specification TDA4841PS ). If the stg(max) WAVE (1) suitable ...
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... Purchase of Philips I components in the I Philips. This specification can be ordered using the code 9398 393 40011. 1999 Oct components conveys a license under the Philips’ system provided the system conforms to the I 57 Product specification TDA4841PS 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors 1999 Oct 25 NOTES 58 Product specification TDA4841PS ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors 1999 Oct 25 NOTES 59 Product specification TDA4841PS ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...