SCN2681AC1N24 NXP Semiconductors, SCN2681AC1N24 Datasheet

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SCN2681AC1N24

Manufacturer Part Number
SCN2681AC1N24
Description
Manufacturer
NXP Semiconductors
Datasheet

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Philips
Semiconductors
Product specification
Supersedes data of 1995 May 01
IC19 Data Handbook
SCN2681
Dual asynchronous receiver/transmitter
(DUART)
INTEGRATED CIRCUITS
1998 Sep 04

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SCN2681AC1N24 Summary of contents

Page 1

SCN2681 Dual asynchronous receiver/transmitter (DUART) Product specification Supersedes data of 1995 May 01 IC19 Data Handbook Philips Semiconductors INTEGRATED CIRCUITS 1998 Sep 04 ...

Page 2

... Programmable baud rate for each receiver and transmitter selectable from: – 22 fixed rates 115.2k baud ORDERING INFORMATION Commercial DESCRIPTION DESCRIPTION V = +5V +5 Plastic DIP 1 24-Pin SCN2681AC1N24 2 28-Pin SCN2681AC1N28 2 40-Pin SCN2681AC1N40 44-Pin Not available NOTES: 1. 400mil-wide Dual In-Line Package 2. 600mil-wide Dual In-Line Package 1998 Sep 04 16-bit programmable Counter/Timer – ...

Page 3

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN CONFIGURATIONS IP3 2 39 IP4 IP5 IP1 4 37 IP6 IP2 CEN IP0 7 34 RESET WRN 8 33 ...

Page 4

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN DESCRIPTION APPLICABLE SYMBOL TYPE SYMBOL TYPE 40/ D0– I/O CEN WRN RDN A0– ...

Page 5

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN DESCRIPTION (Continued) APPLICABLE SYMBOL SYMBOL TYPE TYPE 40/ IP5 X I IP6 GND ABSOLUTE MAXIMUM RATINGS SYMBOL T Operating ambient ...

Page 6

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) AC CHARACTERISTICS SYMBOL PARAMETER SYMBOL PARAMETER Reset Timing (Figure 3) t RESET pulse width RES 6 Bus Timing (Figure 4) t A0-A3 setup time to RDN, ...

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Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) BLOCK DIAGRAM 8 D0–D7 BUS BUFFER OPERATION CONTROL RDN WRN ADDRESS DECODE CEN 4 A0–A3 R/W CONTROL RESET INTERRUPT CONTROL INTRN IMR ISR TIMING BAUD RATE GENERATOR CLOCK SELECTORS COUNTER/ TIMER X1/CLK XTAL OSC ...

Page 8

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) (IMR) and the Interrupt Status Register (ISR). The IMR may be programmed to select only certain conditions to cause INTRN to be asserted. The ISR can be read by the CPU to determine all ...

Page 9

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) generate an interrupt request at OP6 or OP7 and INTRN. When a character is loaded into the Transmit Holding Register (THR), the above conditions are negated. Data is transferred from the holding register to ...

Page 10

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) the FIFO pointers and result in the reading of previously read data. A receiver reset will re-align the pointers. Multidrop Mode The DUART is equipped with a wake up mode for multidrop applications. This ...

Page 11

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 2. Register Bit Formats BIT 7 BIT 6 RxRTS RxINT CONTROL SELECT MR1A MR1A RxRDY MR1B 1 = Yes 1 = FFULL NOTE: *In block error mode, block ...

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Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 2. Register Bit Formats (Continued) BIT 7 BIT 6 BRG SET ACR SELECT MODE AND SOURCE 0 = set set 2 BIT 7 BIT 6 DELTA DELTA IPCR IP 3 ...

Page 13

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) MR2A – Channel A Mode Register 2 MR2A is accessed when the Channel A MR pointer points to MR2, which occurs after any access to MR1A. Accesses to MR2A do not change the pointer. ...

Page 14

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) MR1B – Channel B Mode Register 1 MR1B is accessed when the Channel B MR pointer points to MR1. The pointer is set to MR1 by RESET ‘set pointer’ command applied ...

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Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) 110 Start break. Forces the TxDA output Low (spacing). If the transmitter is empty the start of the break condition will be delayed up to two bit times. If the transmitter is active the ...

Page 16

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) OPCR – Output Port Configuration Register OPCR[7] – OP7 Output Select This bit programs the OP7 output to provide one of the following: – The complement of OPR[7]. – The Channel B transmitter interrupt ...

Page 17

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) ISR[6] – Channel B Change In Break This bit, when set, indicates that the Channel B receiver has detected the beginning or the end of a received break reset when the CPU ...

Page 18

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 3. Bit Rate Generator Characteristics Crystal or Clock = 3.6864MHz NORMAL RATE (BAUD 110 134.5 150 200 300 600 1050 1200 1800 2000 2400 4800 7200 9600 14.4K 19.2k 28.8K 38.4k ...

Page 19

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS RESET A0– CEN t CS RDN D0–D7 FLOAT (READ) WDN D0–D7 (WRITE) RDN IP0–IP6 WRN OP0–OP7 1998 Sep 04 t RES Figure 3. Reset Timing ...

Page 20

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS (Continued) NOTES: 1. INTRN or OP3 – OP7 when used as interrupt outputs. 2. The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response ...

Page 21

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS (Continued) RxC (1X INPUT) RxD TxD D1 TRANSMITTER ENABLED TxRDY (SR2) WRN CTSN (IP0) 2 RTSN (OP0) OPR( NOTES: 1. Timing shown for MR2( ...

Page 22

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS (Continued) D1 RxD RECEIVER ENABLED RxRDY (SR0) FFULL (SR1) RxRDY/ FFULL 2 (OP5) RDN STATUS DATA D1 OVERRUN (SR4) 1 RTS (OP0) OPR( NOTES: 1. Timing shown for MR1(7) = ...

Page 23

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Output Port Notes The output ports are controlled from three places: the OPCR register, the OPR register, and the MR registers. The OPCR register controls the source of the data for the output ports ...

Page 24

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 5. Baud Rates Extended CSR[7:4] ACR[ 0000 50 0001 110 0010 134.5 0011 200 0100 300 0101 600 0110 1,200 0111 1,050 1000 2,400 1001 4,800 1010 7,200 1011 9,600 1100 ...

Page 25

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DIP24: plastic dual in-line package; 24 leads (400 mil) 1998 Sep 04 25 Product specification SCN2681 SOT248-1 ...

Page 26

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DIP28: plastic dual in-line package; 28 leads (600 mil) 1998 Sep 04 26 Product specification SCN2681 SOT117-1 ...

Page 27

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DIP40: plastic dual in-line package; 40 leads (600 mil) 1998 Sep 04 27 Product specification SCN2681 SOT129-1 ...

Page 28

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PLCC44: plastic leaded chip carrier; 44 leads 1998 Sep 04 28 Product specification SCN2681 SOT187-2 ...

Page 29

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) 1998 Sep 04 NOTES 29 Product specification SCN2681 ...

Page 30

Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Data sheet status Data sheet Product Definition status status Objective Development This data sheet contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary ...

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