TDA7572TR STMicroelectronics, TDA7572TR Datasheet - Page 50

• Manufacturer Part Number: TDA7572TR
• Description: IC AMP PWM 200W BRIDGE 64HIQUAD
• Manufacturer: STMicroelectronics
• Type: Class Dr

Specifications of TDA7572TR

• Output Type: 1-Channel (Mono)
• Voltage - Supply: 8 V ~ 58 V
• Features: Digital Inputs, I²C, I²S, Mute, Short-Circuit and Thermal Protection, Standby
• Mounting Type: Surface Mount
• Package / Case: 64-HiQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Max Output Power X Channels @ Load: -

Diagnostics
10.1.6
10.1.7
Note:
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Power supply overcurrent
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●
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Fault handling
Table 33.
in legacy mode (no I
the fault pin, while is present on the clipping detector output pin.
DC offset
Die temperature
Output clipping
Output
overcurrent
Power supply
overcurrent
I
pins exceeds the threshold. Also, the power control SCR is turned on (only if the
PassFETctrl register is set to one). IsenTrip is cleared by the W1TC procedure.
No I
reported on the Address0/Fault_L pin. The value of PassFETctrl bit is determined by
the SDA/SCR_Enb pin, which is read at powerup:
NOTE: The Output current is monitored only when the output signal is in the +/-1.2V
(see offset detector specification) range for more then 100ms. When this condition is
reached a switch present between ISSENM and ISSENP is switched off. Normally this
switch shorts the ISSENM pin to the ISSENP, allowing external filter caps to used to
condition the current sense signal.
2
Cbus: The bit IsenTrip is set when the voltage between the ISSENP and ISSENM
Fault
2
Cbus: In addition the above, the non-latched version of IsenTrip register is
Fault handling
- Latch the offset bit
- Tristate the modulator
- Latch the offset bit and Fault pin
- Tristate the modulator
- Latch the Twarn bit
- Latch the Twarn bit
- Assert the fault pin
- Latch the Clip bit
- Assert the SCL_CLIP_L (if no DAC)
- Assert the Address0 (if DAC)
- Latch the Clip bit
- Assert SCL_CLIP_L
- Latch the IsenTrip bit
- Clip the output current by modulator
injection
- Latch the IsenTrip bit
- Clip the output current by modulator
injection
- Latch the IoutTrip bit
- The SCR is activated if enabled
- Latch the IoutTrip bit
- Assert the Fault pin
- The SCR is activated if enabled
1
2
st
C bus) the Output over-current warning information is not reported on
Threshold (Bus mode: I
2
C/No I
2
C)
The SCR is activated if enabled
Cycle-to-cycle Current limiting is
activated.
If the cycle-by-cycle limitation is
present for more then four PWM
cycles the SCR is activated if the
SCR is enabled and the output FET
are tristated. If the SCR is disabled
the cycle-by cycle limitation keep
going.
2
nd
Threshold
TDA7572