TDA8933BTW/N2,118 NXP Semiconductors, TDA8933BTW/N2,118 Datasheet - Page 5

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TDA8933BTW/N2,118

Manufacturer Part Number
TDA8933BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8933BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Max Output Power X Channels @ Load
20.6W x 1 @ 16 Ohm; 10.3W x 2 @ 8 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935285222118
NXP Semiconductors
Table 2:
UBA2074(A)
Preliminary data sheet
Symbol
CSWP
CPWM
SYNC
nonFAULT 12
PWMa
PMWd
GHB
FSB
SHB
NC
EN
VDC
VDD
GLB
PGND
GLA
NC
SHA
FSA
GHA
Pin description
Pin
9
10
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Description
phase-shift sweep
capacitor
PWM timing capacitor
synchronization
input/output
status signal
input/output
analog PWM dimming
input
digital PWM dimming
input/output
high-side driver output B Gate connection of the high side power switch of full bridge halve B
floating supply output B
high-side source
connection B
not connected
chip enable input
IC low-voltage supply
input
regulated 12 V supply
output/input
low-side driver output B
power ground
low-side driver output A
not connected
high-side source
connection A
floating supply output A
high-side driver output A Gate connection of the high side power switch of full bridge halve A
…continued
Function
A capacitor must be connected between this pin and the signal ground. It sets
the time in which the phase difference between bridge halve A and bridge
halve B is swept down from regulation level to zero or swept up from zero to
regulation level during PWM dimming.
If a capacitor is connected between this pin and the signal ground, it sets the
frequency of the PWM oscillator.
If this pin is connected to signal ground the internal PWM oscillator is
disabled.
By connecting this pin to the SYNC-pins of other ICs, they can synchronise
their hf-oscillators. Also the IC can synchronise to an external pulse source
connected to this pin.
The IC signals a fault condition to an external circuit by pulling this pin low and
external circuits can also signal a fault condition to the IC by pulling this pin
low.
The dutycycle of the internally generated PWM signal is proportional to the
voltage on this pin.
Digital output of internally generated PWM signal if a capacitor is connected to
the CPWM-pin.
Digital input of PWM signal if the CPWM-pin is connected to signal ground.
Note that the signal on the PWMd-pin is active low, so low voltage on the
PWMd-pin means lamps are on.
A buffer capacitor must be connected between this pin and the SHB-pin. This
capacitor is charged when the low side switch B is on and supplies the high
side driver B.
Return for high side gate driver B. Must be connected to the source of the high
side power switch of full bridge halve B.
HV spacer pin
A low voltage on this pin will reset and shutt down the IC
IC supply
A buffer capacitor must be connected between this pin and power ground
Gate connection of the low side power switch of full bridge halve B
return for low side drivers A and B
Gate connection of the low side power switch of full bridge halve A
HV spacer pin
Return for high side gate driver A. Must be connected to the source of the high
side power switch of full bridge halve A.
A buffer capacitor must be connected between this pin and the SHA-pin. This
capacitor is charged when the low side switch A is on and supplies the high
side driver A.
Rev. 02.0 — February 2007
High Voltage Full-bridge control IC for CCFL backlighting
UBA2074(A)
© NXP B.V. 2007. All rights reserved.
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