ATA5830N-PNQW Atmel, ATA5830N-PNQW Datasheet - Page 18
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATA5830N-PNQW
Manufacturer Part Number
ATA5830N-PNQW
Description
Manufacturer
Atmel
Datasheet
1.ATA5830N-PNQW.pdf
(27 pages)
Specifications of ATA5830N-PNQW
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA5830N-PNQW
Manufacturer:
ATMEL
Quantity:
182
Part Number:
ATA5830N-PNQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATA5830N-PNQW1-19
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3.2
3.2.1
18
Receive Path
Atmel ATA5830/ATA5830N
Overview
The receive path consists of a low noise amplifier (LNA), mixer, analog-to-digital converter
(ADC) and a Rx digital signal processor (DSP) as shown
tional-N phase locked loop (PLL) and the Quartz oscillator (XTO) described above delivers the
local oscillator frequency f
registers.
Two separate LNA inputs, one for Low-Band and one for High-Band, are provided to obtain
optimum performance matching for each frequency range and to allow multi band applica-
tions. A radio frequency (RF) level detector at the LNA output and a switchable damping
included into single-pole double-trough (SPDT) switch is used in the presence of large block-
ers to achieve better system blocking performance.
The mixer converts the received RF signal to a low intermediate frequency (IF) of about
250kHz. A double quadrature architecture is used for the mixer to achieve high image rejec-
tion. Additionally, the 3
make receiving without a frontend SAW filter, for example in a car keyfob application, less
critical.
The ADC converts the IF signal into the digital domain. Due to the high effective resolution
(14Bit) of the used ADC the channel filter and RSSI can be realized in the digital signal domain
and no analog gain control (AGC) which can lead to critical timing issues or analog filtering is
required in front of the ADC. This leads to a receiver frontend with good blocking performance
up to the 1dB compression point of the LNA and mixer, and a steep digital channel filters can
be used.
The Rx DSP performs channel filtering and converts the digital output signals of the ADC to
the baseband for demodulation. Due to the digital realization of these functions the Rx DSP
can be adapted to the needs of many different applications since channel bandwidth, data
rate, modulation type, wake-up criteria, signal checks, clock recovery and many other proper-
ties are configurable. See Rx DSP description in
(Rx DSP)” on page
A received signal strength indicator (RSSI) value is built within the Rx DSP completely in the
digital signal domain allowing for a high relative RSSI accuracy and a good absolute accuracy,
which is only deteriorated by the gain errors of LNA, mixer and ADC.
Two independent receive paths A and B are integrated in the Rx DSP after the channel filter
see
different data rate, modulation type and protocol without the need to power up the receive path
more than once to decide which signal should be received. This allows a much lower polling
current in several applications.
The integration of remote keyless entry (RKE), passive entry and go (PEG) and tire pressure
monitoring systems (TPM) into one module is simplified since completely different protocols
can be supported and a low polling current is achieved. It is even possible using different
receive RF bands for different applications by using the two LNA inputs. For example a TPM
receiver can be realized at 433.92MHz while a PEG system uses the 868MHz ISM band with
multi channel bidirectional communication.
Section 3.2.2 “RX Digital Signal Processing (Rx DSP)” on page 19
19.
rd
order suppression of local oscillator (LO) harmonic receiving will
LO
in RXMode. The receive path is controlled wit the RF frontend
Section 3.2.2 “RX Digital Signal Processing
Figure 3-1 on page
and allow the use of
9208DS–RKE–07/11
16. The frac-