SC16C750IA44,529 NXP Semiconductors, SC16C750IA44,529 Datasheet
SC16C750IA44,529
Specifications of SC16C750IA44,529
935270053529
SC16C750IA44-S
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SC16C750IA44,529 Summary of contents
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SC16C750 Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFO Rev. 04 — 20 June 2003 1. General description The SC16C750 is a Universal Asynchronous Receiver and Transmitter (UART) used for serial data communications. Its principal function is to convert parallel data ...
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Philips Semiconductors Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun Break) Independent receiver clock input Transmit, Receive, Line Status, and Data Set interrupts independently controlled Fully programmable character formatting: False start-bit detection Complete status reporting capabilities 3-State ...
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Philips Semiconductors 4. Block diagram SC16C750 D0–D7 DATA BUS IOR, IOR AND IOW, IOW CONTROL LOGIC RESET A0–A2 REGISTER CS0, CS1, CS2 SELECT AS LOGIC DDIS INT TXRDY RXRDY INTERRUPT CONTROL LOGIC Fig 1. Block diagram. 9397 750 11623 Product ...
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Philips Semiconductors 5. Pinning information 5.1 Pinning Fig 2. PLCC44 pin configuration. 9397 750 11623 Product data RCLK SC16C750IA44 CS0 CS1 15 CS2 16 BAUDOUT 17 ...
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Philips Semiconductors XTAL1 XTAL2 TXRDY Fig 3. LQFP64 pin configuration. 5.2 Pin description Table 2: Pin description Symbol Pin PLCC44 LQFP64 A2-A0 28, 27, 17, 18 BAUDOUT 17 64 9397 750 11623 Product data 1 ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC44 LQFP64 CS0, CS1, 14, 15, 59, 61, 62 CS2 16 CTS 40 33 D7-D0 2-9 52, 51, 50, 48, 46, 45, 43, 42 DCD 42 36 DDIS 26 12 DSR ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC44 LQFP64 OUT1, OUT2 38, 35 30, 25 RCLK 10 54 IOR, IOR 24 RTS 36 26 RXRDY ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC44 LQFP64 TXRDY IOW, IOW 20 XTAL1 18 1 [1] XTAL2 19 2 [1] In sleep mode, XTAL2 ...
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Philips Semiconductors 6. Functional description The SC16C750 provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is ...
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Philips Semiconductors Table 3: A2 General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LSR, SPR Baud rate register set (DLL/DLM Enhanced register set (EFR, Xon/off 1- ...
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Philips Semiconductors Table 4: Selected trigger level (characters) 64-byte FIFO 6.3 Hardware flow control When automatic hardware flow control is enabled, the SC16C750 monitors the CTS pin for a remote buffer overflow indication and controls the ...
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Philips Semiconductors 6.5 Programmable baud rate generator The SC16C750 supports high speed modem technologies that have increased input data rates by employing data compression schemes. For example, a 33.6 kbit/s modem that employs data compression may require a 115.2 kbit/s ...
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Philips Semiconductors Table 5: Using 1.8432 MHz crystal Desired baud rate 50 75 110 134.5 150 300 600 1200 1800 2000 2400 3600 4800 7200 9600 19200 38400 56000 6.6 DMA operation The SC16C750 FIFO trigger level provides additional flexibility ...
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Philips Semiconductors 6.7 Sleep mode The SC16C750 is designed to operate with low power consumption. A special sleep mode is included to further reduce power consumption when the chip is not being used. With IER[4] enabled (set to a logic ...
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Philips Semiconductors SC16C750 D0–D7 DATA BUS IOR, IOR AND IOW, IOW CONTROL LOGIC RESET A0–A2 CS0, CS1 REGISTER CS2 SELECT AS LOGIC DDIS INT INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 5. Internal loop-back mode diagram. 9397 750 11623 Product data ...
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Philips Semiconductors 7. Register descriptions Table 8 The assigned bit functions are more fully defined in Table 8: SC16C750 internal registers [ Register Default [2] General Register Set RHR THR ...
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Philips Semiconductors 7.1 Transmit (THR) and Receive (RHR) Holding Registers The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and Transmit Shift Register (TSR). The status of the THR is provided in the Line Status Register (LSR). ...
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Philips Semiconductors Table 9: Bit 1 0 7.2.1 IER versus Receive FIFO interrupt mode operation When the receive FIFO (FCR[0] = logic 1), and receive interrupts (IER[0] = logic 1) are enabled, the receive interrupts and register status will reflect ...
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Philips Semiconductors 7.3 FIFO Control Register (FCR) This register is used to enable the FIFOs, clear the FIFOs, set the receive FIFO trigger levels, and select the DMA mode. 7.3.1 DMA mode Mode 0 (FCR bit 3 = 0): receive ...
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Philips Semiconductors Table 10: Bit Table 11: FCR[ 9397 750 11623 Product data FIFO Control Register bits description Symbol Description Transmit operation in mode ‘1’: When the SC16C750 is in FIFO mode (FCR[0] ...
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Philips Semiconductors 7.4 Interrupt Status Register (ISR) The SC16C750 provides six levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the ISR ...
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Philips Semiconductors 7.5 Line Control Register (LCR) The Line Control Register is used to specify the asynchronous data communication format. The word length, the number of stop bits, and the parity are selected by writing the appropriate bits in this ...
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Philips Semiconductors Table 15: LCR[ Table 16: LCR[ Table 17: LCR[ 9397 750 11623 Product data LCR[5] parity selection LCR[4] LCR[3] Parity selection parity 0 ...
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Philips Semiconductors 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. Table 18: Bit 9397 750 11623 Product data Modem Control Register bits description ...
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Philips Semiconductors 7.7 Line Status Register (LSR) This register provides the status of data transfers between the SC16C750 and the CPU. Table 19: Bit 9397 750 11623 Product data Line Status Register bits ...
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Philips Semiconductors Table 19: Bit 0 7.8 Modem Status Register (MSR) This register provides the current state of the control interface signals from the modem, or other peripheral device to which the SC16C750 is connected. Four bits of this register ...
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Philips Semiconductors Table 20: Bit 1 0 [1] Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated. 7.9 Scratchpad Register (SPR) The SC16C750 provides a temporary data register to store 8 bits ...
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Philips Semiconductors 7.11 SC16C750 external reset conditions Table 22: Register IER ISR LCR MCR LSR MSR FCR EFR Table 23: Output TX RTS DTR RXRDY TXRDY INT 8. Limiting values Table 24: In accordance with the Absolute Maximum Rating System ...
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Philips Semiconductors 9. Static characteristics Table 25: DC electrical characteristics + 2.5V, 3 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter V LOW-level clock input voltage IL(CK) V ...
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Philips Semiconductors 10. Dynamic characteristics Table 26: AC electrical characteristics + 2 10%, unless otherwise specified. amb CC Symbol Parameter clock pulse duration ...
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Philips Semiconductors Table 26: AC electrical characteristics + 2 10%, unless otherwise specified. amb CC Symbol Parameter t delay from start to reset TXRDY 28d t ...
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Philips Semiconductors A0– CS2 CS1–CS0 t 13d t 14d IOW, IOW D0–D7 Fig 7. General write timing when using AS signal. A0–A2 ADDRESS IOR D0–D7 Fig 8. General read timing ...
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Philips Semiconductors A0–A2 ADDRESS IOW D0–D7 Fig 9. General write timing when AS is tied to GND. IOW ACTIVE RTS CHANGE OF STATE DTR DCD CTS DSR INT IOR RI Fig 10. Modem input/output timing. 9397 750 ...
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Philips Semiconductors t 2w EXTERNAL CLOCK Fig 11. External clock timing. START BIT RX INT IOR Fig 12. Receive timing. 9397 750 11623 Product data DATA BITS (5- DATA ...
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Philips Semiconductors START BIT RX RXRDY IOR Fig 13. Receive ready timing in non-FIFO mode. START BIT RX RXRDY IOR Fig 14. Receive ready timing in FIFO mode. 9397 750 11623 Product data DATA BITS (5– ...
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Philips Semiconductors START BIT TX INT t 23d ACTIVE IOW Fig 15. Transmit timing. 9397 750 11623 Product data DATA BITS (5– DATA BITS 6 DATA BITS 7 DATA BITS ACTIVE TX READY ...
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Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #1 TXRDY Fig 16. Transmit ready timing in non-FIFO mode. 9397 750 11623 Product data DATA BITS (5– TRANSMITTER READY t 27d ACTIVE Rev. 04 ...
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Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #16 t 27d TXRDY Fig 17. Transmit ready timing in FIFO mode (DMA mode ‘1’). 9397 750 11623 Product data DATA BITS (5- DATA ...
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Philips Semiconductors 11. Package outline PLCC44: plastic leaded chip carrier; 44 leads pin 1 index DIMENSIONS (mm dimensions are derived from the original inch dimensions) A ...
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Philips Semiconductors LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A ...
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Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be – smaller than 1.27 mm, the footprint longitudinal axis must ...
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Philips Semiconductors [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C oven. ...
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Philips Semiconductors 14. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . ...