HD3-6402R-9Z Intersil, HD3-6402R-9Z Datasheet - Page 7

• Manufacturer Part Number: HD3-6402R-9Z
• Description: IC UART CMOS 5V 2MHZ 40-DIP
• Manufacturer: Intersil

Specifications of HD3-6402R-9Z

• Features: Low Power CMOS
• Number Of Channels: 8
• Voltage - Supply: 4.5 V ~ 5.5 V
• With False Start Bit Detection: Yes
• With Cmos: Yes
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• No. Of Channels: 1
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Max: 5.5V
• Supply Voltage Min: 4.5V
• Rohs Compliant: Yes
• Clock Frequency: 2MHz
• Operating Temperature Max: 85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
Switching Waveforms
A.C. Testing Input, Output Waveform
NOTE: A.C. Testing: All input signals must switch between V
Test Circuit
NOTE: Includes stray and jig capacitance, C
TBR1 - TBR8
TBRL
FIGURE 6. DATA INPUT CYCLE
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
t
VALID DATA
(2)
PW
t
SET
(4)
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7
V
V
IH
IL
+ 20% V
- 50% V
INPUT
t
HOLD
(5)
IH
IL
L
= 50pF.
FIGURE 7. CONTROL REGISTER LOAD
CLS1, CLS2, SBS, PI, EPE
CRL
1.5V
OUT
(SEE NOTE)
CYCLE
IL
HD-6402
HD-6402
FIGURE 10.
FIGURE 9.
t
- 50% V
PW
(2)
VALID DATA
t
C
SET
(4)
L
IL
and V
t
HOLD
(5)
IH
+ 20% V
1.5V
IH
. Input rise and fall times are driven at 1ns/V.
RBR1 - RBR8
FIGURE 8. STATUS FLAG OUTPUT
STATUS OR
OUTPUT
V
V
OH
OL
RRD
SFD
ENABLE TIME OR DATA
OUTPUT ENABLE TIME
t
(6)
EN