SCC2692AE1N28,602 NXP Semiconductors, SCC2692AE1N28,602 Datasheet - Page 12
![IC DUART 28-DIP](/photos/6/82/68298/568-28-dip_sot117-1_sml.jpg)
SCC2692AE1N28,602
Manufacturer Part Number
SCC2692AE1N28,602
Description
IC DUART 28-DIP
Manufacturer
NXP Semiconductors
Datasheet
1.SCC2692AC1N40602.pdf
(30 pages)
Specifications of SCC2692AE1N28,602
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
3Bit
Voltage - Supply
5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Cmos
Yes
Mounting Type
Through Hole
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935027010602
SCC2692AE1N28
SCC2692AE1N28
SCC2692AE1N28
SCC2692AE1N28
The level at the OP pin is the inverse of the bit in the OPR register.
Philips Semiconductors
Table 2.
NOTE:
1998 Sep 04
NOTE: *These status bits are appended to the corresponding data character in the receive FIFO. A read of the status provides these bits
(7:5) from the top of the FIFO together with bits (4:0). These bits are cleared by a “reset error status” command. In character mode they are
discarded when the corresponding data character is read from the FIFO. In block error mode, block error conditions must be cleared by using
the error reset command (command 4x) or a receiver reset.
OPR bit
OP pin
Dual asynchronous receiver/transmitter (DUART)
OPR
OPCR
CTUR
CTLR
IPCR
ACR
SRA
SRB
SRB
IMR
ISR
Register Bit Formats (Continued)
0
1
BIT 7
0 = OPR[7]
1 = TxRDYB
RECEIVED
BRG SET
CHANGE
IN. PORT
CHANGE
BREAK*
SELECT
0 = set 1
1 = set 2
0 = No
1 = Yes
0 = No
1 = Yes
0 = Off
1 = On
C/T[15]
DELTA
0 = No
1 = Yes
INPUT
PORT
C/T[7]
BIT 7
BIT 7
BIT 7
BIT 7
BIT 7
BIT 7
BIT 7
BIT 7
1
0
OP7
IP 3
INT
0
1
BIT 6
0 = OPR[6]
1 = TxRDYA
FRAMING
BREAK B
BREAK B
ERROR*
0 = No
1 = Yes
0 = No
1 = Yes
0 = Off
1 = On
C/T[14]
DELTA
DELTA
DELTA
0 = No
1 = Yes
C/T[6]
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
OP6
1
0
IP 2
INT
MODE AND SOURCE
COUNTER/TIMER
0
1
BIT 5
0 = OPR[5]
1 = RxRDY/
See Table 4
ERROR*
FFULLB
FFULLB
0 = No
1 = Yes
RxRDY/
0 = No
1 = Yes
RxRDY/
0 = Off
1 = On
PARITY
C/T[13]
DELTA
0 = No
1 = Yes
C/T[5]
BIT 5
BIT 5
BIT 5
BIT 5
BIT 5
BIT 5
BIT 5
BIT 5
OP5
IP 1
FFULLB
INT
1
0
0
1
BIT 4
0 = OPR[4]
1 = RxRDY/
OVERRUN
TxRDYB
TxRDYB
ERROR
0 = No
1 = Yes
0 = No
1 = Yes
0 = Off
1 = On
C/T[12]
DELTA
0 = No
1 = Yes
BIT 4
C/T[4]
BIT 4
BIT 4
BIT 4
BIT 4
BIT 4
BIT 4
BIT 4
OP4
FFULLA
12
IP 0
INT
1
0
0
1
BIT 3
COUNTER
COUNTER
0 = Off
1 = On
IP 3 INT
DELTA
0 = Low
1 = High
0 = No
1 = Yes
0 = Off
1 = On
READY
READY
TxEMT
C/T[11]
0 = No
1 = Yes
BIT 3
C/T[3]
BIT 3
BIT 3
BIT 3
BIT 3
BIT 3
BIT 3
IP 3
BIT 3
INT
00 = OPR[3]
01 = C/T OUTPUT
10 = TxCB(1X)
11 = RxCB(1X)
1
0
OP3
0
1
BIT 2
BREAK A
BREAK A
0 = Off
1 = On
IP 2 INT
DELTA
BIT 2
0 = Low
1 = High
0 = No
1 = Yes
0 = Off
1 = On
C/T[10]
TxRDY
DELTA
DELTA
0 = No
1 = Yes
BIT 2
C/T[2]
BIT 2
BIT 2
BIT 2
BIT 2
BIT 2
BIT 2
IP 2
INT
1
0
0
1
BIT 1
IP 1 INT
0 = Off
1 = On
FFULLA
FFULLA
DELTA
0 = Low
1 = High
RxRDY/
0 = No
1 = Yes
RxRDY/
0 = Off
1 = On
FFULL
0 = No
1 = Yes
BIT 1
C/T[9]
C/T[1]
BIT 1
BIT 1
BIT 1
BIT 1
BIT 1
BIT 1
BIT 1
IP 1
INT
00 = OPR[2]
01 = TxCA(16X)
10 = TxCA(1X)
11 = RxCA(1X)
1
0
Product specification
SCC2692
OP2
0
1
0 = Off
1 = On
IP 0 INT
TxRDYA
TxRDYA
BIT 0
DELTA
0 = Low
1 = High
0 = No
1 = Yes
0 = Off
1 = On
BIT 0
RxRDY
0 = No
1 = Yes
BIT 0
C/T[8]
C/T[0]
BIT 0
BIT 0
BIT 0
BIT 0
BIT 0
BIT 0
IP 0
INT
1
0