SCC68681E1N40,112 NXP Semiconductors, SCC68681E1N40,112 Datasheet - Page 24
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SCC68681E1N40,112
Manufacturer Part Number
SCC68681E1N40,112
Description
IC DUART 40DIP
Manufacturer
NXP Semiconductors
Datasheet
1.SCC68681C1A44512.pdf
(29 pages)
Specifications of SCC68681E1N40,112
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
3Bit
Voltage - Supply
5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Cmos
Yes
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935274495112
SCC68681E1N40
SCC68681E1N40
SCC68681E1N40
SCC68681E1N40
Philips Semiconductors
2004 Apr 06
NOTES:
1. INTRN or OP3 – OP7 when used as interrupt outputs.
2. The test for open drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from the mid point of the switching signal, V
Dual asynchronous receiver/transmitter (DUART)
a point 0.5 volts above V
pronounced and can greatly affect the resultant measurement.
NOTE:
C1 AND C2 SHOULD BE BASED ON MANUFACTURER’S SPECIFICATION. PARASITIC CAPACITANCE SHOULD BE
INCLUDED WITH C1 AND C2. R1 IS ONLY REQUIRED IF U1 WILL NOT DRIVE TO X1 INPUT LEVELS
X1/CLK
CTCLK
RxC
TxC
C1 = C2 = 24 pF FOR C
OL
. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and test environment are
FREQUENCY:
LOAD CAPACITANCE (C
TYPE OF OPERATION:
t
t
L
CLK
CTC
t
t
Rx
Tx
= 20 pF
3.6864 MHz
INTERRUPT
(READ OR
OUTPUT
WRITE)
L
TYPICAL CRYSTAL SPECIFICATION
):
CSN
X1
X2
Figure 9. Interrupt timing
Figure 8. Clock timing
1
t
t
CLK
CTC
t
t
Rx
Tx
SCC68681
2 – 4 MHz
12 – 32 pF
PARALLEL RESONANT, FUNDAMENTAL MODE
24
4 pF
3 pF
50 TO
150 k
V
t
M
IR
V
OL
RESISTOR REQUIRED
WHEN U1 IS A TTL DEVICE
V
+0.5V
OL
TO INTERNAL CLOCK DRIVERS
U1
+5 V
R1
1 k
NC
SCC68681
SD00725
X1
X2
Product data
SD00116
M
, to