550AF622M080DG Silicon Laboratories Inc, 550AF622M080DG Datasheet - Page 3

• Manufacturer Part Number: 550AF622M080DG
• Manufacturer: Silicon Laboratories Inc

Specifications of 550AF622M080DG

• Lead Free Status / Rohs Status: Compliant

Table 3. CLK± Output Frequency Characteristics
Table 4. CLK± Output Levels and Symmetry
Nominal Frequency
Temperature Stability
Absolute Pull Range
Aging
Power up Time
Notes:
LVPECL Output Option
LVDS Output Option
CML Output Option
CMOS Output Option
Rise/Fall time (20/80%)
Symmetry (duty cycle)
Notes:
1. See Section 3. "Ordering Information" on page 8 for further details.
2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.
3. Nominal output frequency set by V
4. Selectable parameter specified by part number.
5. Time from power up or tristate mode to f
1. 50 Ω to V
2. R
3. C
Parameter
Parameter
term
L
= 15 pF
= 100 Ω (differential).
DD
5
– 2.0 V.
2
1,2,3
1,4
2
1,4
3
1
Symbol
Symbol
APR
SYM
t
t
V
V
V
V
V
V
OSC
R,
V
V
V
f
OD
OD
OD
OH
O
SE
OL
O
O
O
t
F
CNOM
LVPECL:
LVDS:
CMOS:
Frequency drift over 15 year life.
Frequency drift over first year.
CMOS with C
O
= V
swing (single-ended)
LVPECL/LVDS/CML
.
LVDS/CML/LVPECL
Test Condition
DD
T
I
A
I
Test Condition
OH
swing (diff)
OL
swing (diff)
swing (diff)
/2.
mid-level
mid-level
mid-level
= –40 to +85 ºC
V
1.25 V (diff)
V
= 32 mA
= 32 mA
CMOS
DD
DD
Rev. 0.6
/2
– 1.3 V (diff)
L
= 15 pF
V
0.8 x V
DD
1.125
0.55
0.70
Min
1.1
0.5
45
—
—
—
—
– 1.42
–100
Min
–20
–50
±25
10
10
—
—
—
DD
V
DD
0.95
1.20
Typ
0.7
—
—
—
—
—
—
—
Typ
– 0.75
1
—
—
—
—
—
—
—
—
—
V
DD
+100
±375
Max
945
160
+20
+50
±10
1.275
±3
10
Max
0.95
1.20
V
350
1.9
0.9
0.4
55
—
—
– 1.25
DD
Si550
Units
MHz
ppm
ppm
ppm
Units
ms
V
V
V
V
ps
ns
%
V
V
V
V
PP
PP
PP
PP
3