SC16C850SVIBS,115 NXP Semiconductors, SC16C850SVIBS,115 Datasheet - Page 6

• Manufacturer Part Number: SC16C850SVIBS,115
• Description: IC UART SGL 1.8V W/FIFO 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of SC16C850SVIBS,115

• Features: Programmable
• Number Of Channels: 1, UART
• Fifo's: 128 Byte
• Protocol: RS485
• Voltage - Supply: 1.8V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935286785115; SC16C850SVIBS-G; SC16C850SVIBS-G

NXP Semiconductors
6. Functional description
SC16C850SV
Product data sheet
6.1 UART selection
The SC16C850SV provides serial asynchronous receive data synchronization,
parallel-to-serial and serial-to-parallel data conversions for both the transmitter and
receiver sections. These functions are necessary for converting the serial data stream into
parallel data that is required with digital data systems. Synchronization for the serial data
stream is accomplished by adding start and stop bits to the transmit data to form a data
character (character orientated protocol). Data integrity is ensured by attaching a parity bit
to the data character. The parity bit is checked by the receiver for any transmission bit
errors. The electronic circuitry to provide all these functions is fairly complex, especially
when manufactured on a single integrated silicon chip. The SC16C850SV represents
such an integration with greatly enhanced features. The SC16C850SV is fabricated with
an advanced CMOS process.
The SC16C850SV is an upward solution to the SC16C650B with a VLIO interface that
provides a single UART capability with 128 bytes of transmit and receive FIFO memory,
instead of 32 bytes for the SC16C650B. The SC16C850SV is designed to work with high
speed modems and shared network environments that require fast data processing time.
Increased performance is realized in the SC16C850SV by the transmit and receive
FIFOs. This allows the external processor to handle more networking tasks within a given
time. In addition, the four selectable receive and transmit FIFO trigger interrupt levels are
provided in normal mode, or 128 programmable levels are provided in extended mode for
maximum data throughput performance especially when operating in a multi-channel
environment (see
greatly reduces the bandwidth requirement of the external controlling CPU, and increases
performance.
A low power pin (LOWPWR) is provided to further reduce power consumption by isolating
the host interface bus.
The SC16C850SV is capable of operation up to 20 Mbit/s with an external 80 MHz clock.
With a 24 MHz crystal, the SC16C850SV is capable of operation up to 6 Mbit/s.
The rich feature set of the SC16C850SV is available through internal registers. These
features are: selectable and programmable receive and transmit FIFO trigger levels,
selectable TX and RX baud rates, and modem interface controls (all standard features).
Following a power-on reset an external reset or a software reset, the SC16C850SV is
software compatible with the previous generation SC16C650B.
The UART provides the user with the capability to bidirectionally transfer information
between a CPU and an external serial device. The CS pin together with addresses A6 and
A7 determine if the UART is being accessed; see
Table 3.
H = HIGH; L = LOW; X = Don’t care.
Chip Select
CS = H, A7 = X, A6 = X
CS = L, A7 = L, A6 = L
CS = L, A7 = L, A6 = H
CS = L, A7 = H, A6 = X
Serial port selection
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
All information provided in this document is subject to legal disclaimers.
Section 6.2 “Extended mode (128-byte
Rev. 2 — 22 March 2011
Function
device not selected
UART selected
device not selected
device not selected
Table
3.
FIFO)”). The FIFO memory
SC16C850SV
© NXP B.V. 2011. All rights reserved.
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