595CG160M000DG Silicon Laboratories Inc, 595CG160M000DG Datasheet - Page 4

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595CG160M000DG

Manufacturer Part Number
595CG160M000DG
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of 595CG160M000DG

Lead Free Status / Rohs Status
Supplier Unconfirmed
Si 595
Table 5. CLK± Output Phase Jitter
Table 6. CLK± Output Period Jitter
Table 7. CLK± Output Phase Noise (Typical)
4
Table 8. Absolute Maximum Ratings
Phase Jitter (RMS)
for F
525 MHz
Notes:
Period Jitter*
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
Maximum Operating Temperature
Supply Voltage
Offset Frequency
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN256 and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
OUT
requirements. See “AN266: VCXO Tuning Slope (K
100 kHz
10 MHz
20 MHz
100 Hz
10 kHz
of 50 MHz < F
1 MHz
1 kHz
Parameter
Parameter
1,2
OUT
Parameter
185 ppm/V
74.25 MHz
LVPECL
Symbol
Symbol
J
–101
–121
–134
–149
–151
–150
–77
PER
J
1
Kv = 45 ppm/V
Kv = 95 ppm/V
Kv = 125 ppm/V
Kv = 185 ppm/V
Kv = 380 ppm/V
Preliminary Rev. 0.2
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
Test Condition
Test Condition
V
Peak-to-Peak
), Stability, and Absolute Pull Range (APR)” for more information.
RMS
185 ppm/V
148.5 MHz
LVPECL
–128
–144
–147
–148
–116
Symbol
–68
–95
T
V
AMAX
DD
V
that meets the application’s minimum APR
Min
Min
–0.5 to +3.8
Rating
155.52 MHz
85
95 ppm/V
LVPECL
–101
–127
–144
–147
–148
–119
–77
Typ
Typ
0.5
0.5
0.5
0.5
0.7
35
3
Max
Max
Units
ºC
V
dBc/Hz
Units
Units
Units
ps
ps

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