571AMC000154DG Silicon Laboratories Inc, 571AMC000154DG Datasheet - Page 7

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571AMC000154DG

Manufacturer Part Number
571AMC000154DG
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of 571AMC000154DG

Lead Free Status / Rohs Status
Compliant
Table 4. CLK± Output Levels and Symmetry
Table 5. CLK± Output Phase Jitter (Si570)
LVPECL Output Option
LVDS Output Option
CML Output Option
CMOS Output Option
Rise/Fall time (20/80%)
Symmetry (duty cycle)
Notes:
Phase Jitter (RMS)*
for F
Phase Jitter (RMS)*
for F
500 MHz
Phase Jitter (RMS)
for F
CMOS Output Only
*Note: Refer to AN256 for further information.
1. 50  to V
2. R
3. C
OUT
OUT
OUT
Parameter
term
L
Parameter
> 500 MHz
of 125 to
of 10 to 160 MHz
= 15 pF
= 100  (differential).
DD
– 2.0 V.
2
2
3
1
Symbol
Symbol
SYM
t
V
V
V
V
V
V
R,
V
V
V
OD
OD
OD
OH
SE
OL
O
O
O
J
J
J
t
F
LVPECL:
LVDS:
CMOS:
50 kHz to 80 MHz (OC-192)
50 kHz to 20 MHz (OC-192)
50 kHz to 80 MHz (OC-192)
2.5/3.3 V option swing (diff)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
2.5/3.3 V option mid-level
1.8 V option swing (diff)
CMOS with C
1.8 V option mid-level
swing (single-ended)
LVPECL/LVDS/CML
Test Condition
Test Condition
I
I
OH
OL
swing (diff)
swing (diff)
mid-level
mid-level
V
1.25 V (diff)
V
= 32 mA
= 32 mA
DD
DD
Rev. 1.2
/2
– 1.3 V (diff)
L
= 15 pF
V
0.8 x V
DD
1.125
0.55
1.10
0.35
Min
Min
1.1
0.5
45
– 1.42
DD
V
V
DD
DD
0.425
1.50
0.25
0.26
0.36
0.34
0.62
0.61
1.20
Typ
Typ
0.7
Si570/Si571
– 1.30
– 0.36
1
V
DD
1.275
Max
0.95
1.90
0.50
Max
0.40
0.37
0.50
0.42
V
350
1.9
0.9
0.4
55
– 1.25
DD
Units
Units
V
V
V
V
V
ps
ps
ps
ps
ns
%
V
V
V
V
V
PP
PP
PP
PP
PP
7

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