DS21554L Maxim Integrated Products, DS21554L Datasheet - Page 36

IC TXRX E1 1-CHIP 5V 100-LQFP

DS21554L

Manufacturer Part Number
DS21554L
Description
IC TXRX E1 1-CHIP 5V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21554L

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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CCR1: COMMON CONTROL REGISTER 1 (Address = 14 Hex)
5.3.
When CCR1.7 is set to one, the DS21354/DS21554 enter a framer loopback (FLB) mode. See
for more details. This loopback is useful in testing and debugging applications. In FLB, the SCT will loop
data from the transmit side back to the receive side. When FLB is enabled, the following will occur:
1) Data will be transmitted as normal at TPOSO and TNEGO.
2) Data input via RPOSI and RNEGI will be ignored.
3) The RCLK output will be replaced with the TCLK input.
SYMBOL
(MSB)
THDB3
RHDB3
TCRC4
RCRC4
TG802
RG802
FLB
RSM
FLB
Framer Loopback
THDB3
POSITION
CCR1.7
CCR1.6
CCR1.5
CCR1.4
CCR1.3
CCR1.2
CCR1.1
CCR1.0
TG802
Framer Loopback.
0 = loopback disabled
1 = loopback enabled
Transmit HDB3 Enable.
0 = HDB3 disabled
1 = HDB3 enabled
Transmit G.802 Enable. See Section
0 = do not force TCHBLK high during bit 1 of time slot 26
1 = force TCHBLK high during bit 1 of time slot 26
Transmit CRC4 Enable.
0 = CRC4 disabled
1 = CRC4 enabled
Receive Signaling Mode Select.
0 = CAS signaling mode
1 = CCS signaling mode
Receive HDB3 Enable.
0 = HDB3 disabled
1 = HDB3 enabled
Receive G.802 Enable. See Section
0 = do not force RCHBLK high during bit 1 of time slot 26
1=force RCHBLK high during bit 1 of time slot 26
Receive CRC4 Enable.
0 = CRC4 disabled
1 = CRC4 enabled
TCRC4
36 of 124
NAME AND DESCRIPTION
RSM
18
RHDB3
18
for details.
for details.
RG802
RCRC4
Figure 2-1
(LSB)

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