DS2172TN+T&R Maxim Integrated Products, DS2172TN+T&R Datasheet - Page 9

• Manufacturer Part Number: DS2172TN+T&R
• Description: IC BIT ERROR RATE TESTER 32TQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS2172TN+T&R

• Function: Bit Error Rate Tester (BERT)
• Number Of Circuits: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 10mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Interface: -
• Other names: 90-2172T+NTR

7.0 ERROR INSERT REGISTER
The Error Insertion Register (EIR) controls circuitry within the DS2172 that allows the generated pattern
to be intentionally corrupted. Bit errors can be inserted automatically at regular intervals by properly
programming the EIR0 to EIR2 bits or bit errors can be inserted at random (under microcontroller
control) via the EIR.3 bit.
EIR: ERROR INSERT REGISTER (Address=07 Hex)
ERROR BIT INSERTION Table 3
SYMBOL POSITION NAME AND DESCRIPTION
(MSB)
RINV
TINV
EIB2
EIB2
EIB1
EIB0
SBE
0
0
0
0
1
1
1
1
-
-
-
EIR.7
EIR.6
EIR.5
EIR.4
EIR.3
EIR.2
EIR.1
EIR.0
EIB1
-
0
0
1
1
0
0
1
1
Not Assigned. Should be set to 0 when written to.
Not Assigned. Should be set to 0 when written to.
Transmit Data Inversion Select.
0 = do not invert data to be transmitted at TDATA
1 = invert data to be transmitted at TDATA
Receive Data Inversion Select.
0 = do not invert data received at RDATA
1 = invert data received at RDATA
Single Bit Error Insert. A low to high transition will create a single bit
error. Must be cleared and set again for a subsequent bit error to be
inserted. Can be used to accomplish rates not addressed in Table 3 (e.g.,
BER of less than 10
Error Insert Bit 2. See Table 3.
Error Insert Bit 1. See Table 3.
Error Insert Bit 0. See Table 3.
TINV
EIB0
0
1
0
1
0
1
0
1
RINV
-7
9 of 22
).
SBE
no errors automatically inserted
ERROR RATE INSERTED
EIR2
10
10
10
10
10
10
10
-1
-2
-3
-4
-5
-6
-7
EIR1
(LSB)
EIR0
DS2172