DS21354LC1+ Maxim Integrated Products, DS21354LC1+ Datasheet - Page 90
![IC TXRX E1 3.3V 100-LQFP](/photos/6/82/68291/406-100-lqfp_sml.jpg)
DS21354LC1+
Manufacturer Part Number
DS21354LC1+
Description
IC TXRX E1 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2154LNA2.pdf
(124 pages)
Specifications of DS21354LC1+
Function
Single-Chip Transceiver
Interface
E1, HDLC
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
- Current page: 90 of 124
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16.
The
SAMPLE/PRELOAD, BYPASS, and EXTEST. Optional public instructions included are HIGHZ,
CLAMP, and IDCODE. See
Standard Test Access Port and Boundary Scan Architecture.
The DS21354/DS21554 are enhanced versions of the DS2152 and are backward pin compatible. The
JTAG feature uses pins that had no function in the DS2152. When using the JTAG feature, be sure FMS
(pin 76) is tied low, enabling the newly defined pins of the DS21354/DS21554. Details on Boundary
Scan Architecture and the Test Access Port can be found in IEEE 1149.1-1990, IEEE 1149.1a-1993, and
IEEE 1149.1b-1994.
The Test Access Port has the necessary interface pins: JTRST, JTCLK, JTMS, JTDI, and JTDO. See the
pin descriptions in Section
DS21354/DS21554
JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
3
for details.
Figure
IEEE
16-1. The device contains the following as required by IEEE 1149.1
1149.1
design
90 of 124
supports
Bypass Register
Boundary Scan Register
Device Identification Register
the
standard
instruction
codes
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