C8051F700-GQR Silicon Laboratories Inc, C8051F700-GQR Datasheet - Page 91

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C8051F700-GQR

Manufacturer Part Number
C8051F700-GQR
Description
MCU 8-Bit C8051F70x 8051 CISC 15KB Flash 1.8V/3V 64-Pin TQFP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F700-GQR

Package
64TQFP
Device Core
8051
Family Name
C8051F70x
Maximum Speed
25 MHz
Ram Size
512 Byte
Program Memory Size
15 KB
Operating Supply Voltage
1.8|3 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
54
Interface Type
I2C/SMBus/SPI/UART
On-chip Adc
16-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
4

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SFR Definition 15.5. CS0SS: Capacitive Sense Auto-Scan Start Channel
SFR Address = 0x92; SFR Page = F
SFR Definition 15.6. CS0SE: Capacitive Sense Auto-Scan End Channel
SFR Address = 0x93; SFR Page = F
Name
Reset
Name
Reset
Bit
7:6
5:0
Bit
7:6
5:0
Type
Type
Bit
Bit
CS0SS[5:0]
CS0SE[5:0]
Unused
Unused
Name
Name
R
R
7
0
7
0
Read = 00b; Write = Don’t care
Starting Channel for Auto-Scan.
Sets the first CS0 channel to be selected by the mux for Capacitive Sense conver-
sion when auto-scan is enabled and active. All channels detailed in CS0MX SFR
Definition 15.12 are possible choices for this register.
When auto-scan is enabled, a write to CS0SS will also update CS0MX.
Read = 000b; Write = Don’t care
Ending Channel for Auto-Scan.
Sets the last CS0 channel to be selected by the mux for Capacitive Sense conver-
sion when auto-scan is enabled and active. All channels detailed in CS0MX SFR
Definition 15.12 are possible choices for this register.
R
R
6
0
6
0
5
0
5
0
Rev. 1.0
4
0
4
0
Description
Description
3
0
3
0
CS0SS[5:0]
CS0SE[5:0]
R/W
R/W
C8051F70x/71x
2
0
2
0
1
0
1
0
0
0
0
0
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