USB3500-ABZJ Standard Microsystems (SMSC), USB3500-ABZJ Datasheet - Page 11

• Manufacturer Part Number: USB3500-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB3500-ABZJ

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Package Type: QFN
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface
Datasheet
SMSC USB3500
3.2
PIN
10
11
1
2
3
4
5
6
7
8
9
Pin Definitions
XCVRSEL[0]
SUSPENDN
TERMSEL
TXREADY
TXVALID
VDD3.3
RESET
NAME
VBUS
VSS
DP
ID
DIRECTION,
Ground
Analog
Analog
Analog
Output
TYPE
Input,
Input
Input
Input
Input
Input
I/O,
N/A
I/O,
Table 3.1 USB3500 Pin Definitions
DATASHEET
ACTIVE
LEVEL
High
High
High
Low
N/A
N/A
N/A
N/A
N/A
N/A
N/A
11
DESCRIPTION
PHY ground.
Transceiver Select. These signals select between
the FS and HS transceivers:
Transceiver select.
00: HS
01: FS
10: LS
11: LS data, FS rise/fall times
Termination Select. This signal selects between the
FS and HS terminations:
0: HS termination enabled
1: FS termination enabled
Transmit Data Ready. If TXVALID is asserted, the
Link must always have data available for clocking
into the TX Holding Register on the rising edge of
CLKOUT. TXREADY is an acknowledgement to the
Link that the transceiver has clocked the data from
the bus and is ready for the next transfer on the bus.
If TXVALID is negated, TXREADY can be ignored by
the Link.
VBUS pin of the USB cable.
ID pin of the USB cable.
Suspend. Places the transceiver in a mode that
draws minimal power from supplies. In host mode,
R
R
the clocks are off.
0: PHY in suspend mode
1: PHY in normal operation
Transmit Valid. Indicates that the DATA bus is valid
for transmit. The assertion of TXVALID initiates the
transmission of SYNC on the USB bus. The
negation of TXVALID initiates EOP on the USB.
Control inputs (OPMODE[1:0],
TERMSEL,XCVERSEL) must not be changed on the
de-assertion or assertion of TXVALID.
Reset. Reset all state machines. After coming out
of reset, must wait 5 rising edges of clock before
asserting TXValid for transmit.
Assertion of Reset: May be asynchronous to
CLKOUT
De-assertion of Reset: Must be synchronous to
CLKOUT
3.3V PHY Supply. Provides power for USB 2.0
Transceiver, UTMI+ Digital, Digital I/O, and
Regulators.
D+ pin of the USB cable.
PU
PD
is removed during suspend. In device mode,
is controlled by TERMSEL. In suspend mode
Revision 1.0 (06-05-08)