FC-255 32.7680K-A0 Epson, FC-255 32.7680K-A0 Datasheet - Page 12
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FC-255 32.7680K-A0
Manufacturer Part Number
FC-255 32.7680K-A0
Description
Manufacturer
Epson
Datasheet
1.FC-255_32.7680K-A0.pdf
(17 pages)
Specifications of FC-255 32.7680K-A0
Lead Free Status / Rohs Status
Compliant
SED1797 D
Gate Output
“V
tive gate output pins, and “V
Inputting “L” level to the reset pin (XRES) resets data in all the shift registers and “V
output.
If the reset pin is not used, inputting 240 clocks clears data in all the shift registers with shift data input fixed to the “L”
level. Note, however, gate output during this initialization period becomes indefinite.
Timing Chart
Case: SHL = “V
10
ON
” voltage is output while “H” level ON signals are output for data in the shift registers associated with the respec-
CPV
XRES
DIO1
XOE
O1
O2
O3
O240
DIO2
0B
CC
Series
” (reference example)
1
OFF
” voltage is output while “L” level OFF signals are output.
2
3
EPSON
239 240
OFF
” voltage is applied for gate
V
V
ON
OFF