3222/3223-DB1 Silicon Laboratories Inc, 3222/3223-DB1 Datasheet - Page 4

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3222/3223-DB1

Manufacturer Part Number
3222/3223-DB1
Description
EVAL BOARD FOR IA3222/3223
Manufacturer
Silicon Laboratories Inc
Series
EZ DAA™r
Datasheets

Specifications of 3222/3223-DB1

Main Purpose
Telecom, Data Acquisition Arrangement (DAA)
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
IA3222, IA3223
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
IA3222/3223-EVB
2. Getting Started
The Interposer Board's simplified silkscreen is shown in Figure 4. Refer to the schematic for connector pinouts.
The board must be powered using 3.3 V through J3 according to the polarity indicated on the silkscreen. The DAA
Demo Board must be plugged into connector J2 on the Interposer as shown in Figure 3. The DAA Modem Side is
powered via the Interposer.
Table 1 lists the DAA registers, which can be programmed via DIP switch banks on the Interposer Board. A
complete description of these registers can be found in the IA3222/3223 data sheet.
In order to program the DAA, the corresponding DIP switches must be set to the desired state; then, switch SW5
must be set to the momentary "write" position. Every push of SW5 makes the CPLD write all the DAA's read/write
registers based on the current state of the DIP switches.
The line-status register and the ECHO bit in the Line-Side LSB register are read-only. If switch SW4 is set to "read,"
those read-only bits are monitored continuously and updated onto the LEDs. An LED turned on means a high
state.
4
A2
0
0
0
0
1
1
1
A1
0
0
1
1
0
0
1
A0
X
0
1
0
1
0
1
Line Side programming
Line Side programming
Line status (read only)
Figure 4. Interposer Board Simplified Silkscreen
Thresholds
Reserved
Register
Dividers
Control
Table 1. DAA Registers
Preliminary Rev. 0.1
J4
RNG/PPU
Reserved
Reserved
LTH1
OFH
LP5
LP1
D3
Reserved
LIU/LDN
LTH0
LSR
LP4
LP0
D2
F2
Reserved
SGAIN
LSTAT
ECHO
RTH1
LP3
D1
F1
Reserved
REVID
RTH0
PWD
LP2
D0
LP
F0

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